Hi! I purchased the A version of the chip by mistake. It seems the only difference is the config register bit 1. It always reads as IOC and BPNV set, which it should be at power up. I'm able to do the JEDEC read command, and get the correct results. I can set and clear the WREN bit in the status register (and read it back), so I know the SPI bus is working. I also have other chips on the board that I can read/write via spi, so that's all good. I thought by writing the config bits I'd be able to reset the IOC bit to enable the WP and HOLD pins, but I cannot. I'm trying to use the part in SPI single bit mode, and since I'm reading/writing some things it seems to be working. I am unable to do an erase or write of any kind; I never get a busy bit, pretty sure it's because of WP not being enabled. I replaced the part, same result. I've used the predecessor part SST25VF064 in another product so I thought this would be a slam dunk!! So, sorry for the long prelude, is the IOC bit always set (not able to set to zero) in the A version, and is it preventing me from erasing/writing in single bit SPI?