/**
 *  @copyright       © 2026 Microchip Technology Inc.  
	Microchip Technology Inc. and its subsidiaries. You may use this
    software and any derivatives exclusively with Microchip products.

    THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
    EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
    WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
    PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP PRODUCTS, COMBINATION
    WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.

    IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
    INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
    WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
    BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
    FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
    ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
    THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.

    MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF THESE
    TERMS. 
*
*************************************************************************/

/**
 *  @file            diag_sram_replication.c
 *  @version         1.0
 *  @brief           This file has the implementation for the SRAM replication
 *                   diagnostics. 
 *  @see             diag_sram.h
 *************************************************************************/
/*Function headers*/
#include "diag_sram.h"
#include "diag_sram_shared.h"

/*
 *The API writes to a block of RAM of max 1024 bytes or 256 SRAM memory locations.
 *The data has to be 32 bit aligned. The "size" argument is the count of words 
 *in the native word width which is = 32bits.
*/
uint32_t DIAG_SRAM_ReplicationWrite(const uint32_t srcAddress[], uint32_t backUpAddress[], uint8_t size)
{
    uint8_t index = 0U;
    uint32_t retVal;
    uint32_t overLapSize;
    /* LDRA_EXCLUDE 439 S <justification start>Address is captured in backUpAddrVal. Violation Ignored.<justification end> */
    uint32_t srcAddrVal = (uint32_t)srcAddress;
    /* LDRA_EXCLUDE 439 S <justification start>Address is captured in backUpAddrVal. Violation Ignored.<justification end> */
    uint32_t backUpAddrVal = (uint32_t)backUpAddress;
    overLapSize = backUpAddrVal > srcAddrVal ? (backUpAddrVal-srcAddrVal) : (srcAddrVal-backUpAddrVal);
    if((srcAddress == NULL) || (backUpAddress == NULL))
    {
        DIAG_SRAM_SetRetValue(DIAG_INVALID_PARAM);
    }
    else if((size > DIAG_SRAM_MEMORY_BLOCK_SIZE) || (size == 0U))
    {
        DIAG_SRAM_SetRetValue(DIAG_INVALID_PARAM);
    }
    else if(overLapSize < size)
    {
        DIAG_SRAM_SetRetValue(DIAG_FAIL);
    }
    else 
    {
        while(index < size)
        {
            backUpAddress[index] = ~srcAddress[index];
            index += 1U;
        }  
        DIAG_SRAM_SetRetValue(DIAG_PASS);
    }
    retVal = DIAG_SRAM_GetRetValue();
    return(retVal);
}

uint32_t DIAG_SRAM_IsBackedUpDataValid(const uint32_t srcAddress[], const uint32_t backedUpAddress[], uint8_t size)
{
    uint8_t dataIndex = 0U;
    uint32_t retVal;
    DIAG_SRAM_SetRetValue(DIAG_PASS);
    if((srcAddress == NULL) || (backedUpAddress == NULL))
    {
        DIAG_SRAM_SetRetValue(DIAG_INVALID_PARAM);
    }
    else if((size > DIAG_SRAM_MEMORY_BLOCK_SIZE) || (size == 0U))
    {
        DIAG_SRAM_SetRetValue(DIAG_INVALID_PARAM);
    }
    else
    {
       while(dataIndex < size)
       {
           if((backedUpAddress[dataIndex] ^ srcAddress[dataIndex]) != 0xFFFFFFFFU)
           {
               DIAG_SRAM_SetRetValue(DIAG_FAIL);
               break;
           }
           dataIndex += 1U;
       }
    }
    retVal = DIAG_SRAM_GetRetValue();
    return(retVal);
}

