/**
*   @copyright       © 2026 Microchip Technology Inc.
    Microchip Technology Inc. and its subsidiaries. You may use this
    software and any derivatives exclusively with Microchip products.

    THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
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*
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/**
 *  @file            diag_gpio_iomonitortest.c
 *  @version         1.0
 *  @brief           This file has the implementation for the GPIO IO
					 monitor test. @see diag_gpio.h
 *
 *************************************************************************/
#include "diag_gpio.h"
#include "diag_gpio_shared.h"

static uint32_t ioimBaseAddr[NUM_IOIM_INSTANCES] = {0x1E90U,0x1E9CU,0x1EA8U,0x1EB4U};
static uint32_t DIAG_GPIO_IoimInstResult;

static void DIAG_GPIO_IOIM_SetStatus(uint16_t index)
{
     DIAG_GPIO_IoimInstResult |= 1U << (index);
}

uint32_t DIAG_GPIO_IntegrityMonitorTest(void)
{
    uint32_t retVal;
    uint16_t index = 0U;
    uint32_t ioimConRegAddr = 0U;
    
    /*LDRA_EXCLUDE 45 D <justification start> Pointer to IOIMxCON register, address assigned from lookup table and not NULL. Violation ignored <justification end>*/
	ioimRegAddr_t ioimConRegArrPtr;
    intrFlagRegAddr_t ioimIntrFlagRegArrPtr;
    intrEnbRegAddr_t ioimIntrEnableRegArrPtr;
    uint16_t timeout1 = DIAG_GPIO_IOIM_TIMEOUT;
    uint16_t timeout2 = DIAG_GPIO_IOIM_TIMEOUT; 
    
    /*LDRA_EXCLUDE 606 S <justification start> This is not a function pointer. Violation ignored <justification end>*/
	ioimIntrFlagRegArrPtr = (intrFlagRegAddr_t)DIAG_GPIO_IOIM_INTR_FLAG;
    /*LDRA_EXCLUDE 606 S <justification start> This is not a function pointer. Violation ignored <justification end>*/
	ioimIntrEnableRegArrPtr = (intrEnbRegAddr_t)DIAG_GPIO_IOIM_INTR_ENB;
    DIAG_GPIO_IoimInstResult = 0U;
    
    while(index < NUM_IOIM_INSTANCES)
    {
        /*LDRA_EXCLUDE 606 S <justification start> This is not a function pointer. Violation ignored <justification end>*/
		ioimConRegAddr = ioimBaseAddr[index];
        /*LDRA_EXCLUDE 440 S <justification start> Pointer here is made to point to first register of each IOIM instance.  Violation ignored <justification end>*/
	    /*LDRA_EXCLUDE 45 D <justification start> Pointer to IOIMxCON register, address assigned from lookup table and not NULL. Violation ignored <justification end>*/
         ioimConRegArrPtr = (ioimRegAddr_t)ioimConRegAddr; 
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) &= DIAG_GPIO_IOIM_DISABLE;
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMBLK_REG]) = DIAG_GPIO_IOIM_BLKTIME;
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMSTAT_REG]) = 0U;
        
        /*LDRA_EXCLUDE 51 S <justification start> Register offset from base address shifted within known range, violation ignored <justification end> */
		 ((*ioimIntrFlagRegArrPtr)[0]) &= ~(1U << (index + DIAG_GPIO_IOIM_INTR_OFFSET));
        /*LDRA_EXCLUDE 51 S <justification start> Register offset from base address shifted within known range, violation ignored <justification end> */
		 ((*ioimIntrEnableRegArrPtr)[0]) = 1U << (index + DIAG_GPIO_IOIM_INTR_OFFSET);
        
        /*Test FAULT INJ Mode, ATEST = 0x10 FAULT inj mode*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_ATEST_FLT;
        /*make sure FLTINJ and OKINJ is clear*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) &= DIAG_GPIO_IOIMCON_FLAG_CLR;
        /*module turned on*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_IOIM_ENABLE;
        /*FLTINJ = 1*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_IOIM_FLTINJ;
        while(((((*ioimConRegArrPtr)[DIAG_GPIO_IOIMSTAT_REG]) & (DIAG_GPIO_IOIM_FLTINJ_FLAG)) != DIAG_GPIO_IOIM_FLTINJ_FLAG) && (timeout1 != 0U)) //check for ERR bit
        {
            /*LDRA_EXCLUDE 151 D <justification start> The timeout value is restored for the next loop. Violation ignored<justification end>*/
			timeout1 -= 1U;
        }
        
        /*Test OK INJ Mode, ATEST = 0x11 OK inj mode*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) &= DIAG_GPIO_IOIM_DISABLE;
        /*make sure FLTINJ and OKINJ is clear*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) &= DIAG_GPIO_IOIMCON_FLAG_CLR;
        /*Test OK INJ Mode, ATEST = 0x11 OK inj mode*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_ATEST_OK;
        /*module turned on*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_IOIM_ENABLE;
        /*OKINJ = 1*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) |= DIAG_GPIO_IOIM_OKINJ;
        while(((((*ioimConRegArrPtr)[DIAG_GPIO_IOIMSTAT_REG]) & (DIAG_GPIO_IOIM_OKINJ_FLAG)) != DIAG_GPIO_IOIM_OKINJ_FLAG) && (timeout2 != 0U)) //check for OK bit
        {
            /*LDRA_EXCLUDE 151 D <justification start> The timeout value is restored for the next loop. Violation ignored<justification end>*/
			timeout2 -= 1U;
        }
    
        if((timeout1 == 0U) || (timeout2 == 0U))
        {
            DIAG_GPIO_IOIM_SetStatus(index);
        }      
        
        /*Disable the module instance and clear INJ and ATEST bits*/
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMCON_REG]) &= DIAG_GPIO_IOIMCON_CLR; 
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMBLK_REG]) = 0U;
        ((*ioimConRegArrPtr)[DIAG_GPIO_IOIMSTAT_REG]) = 0U;
        /*LDRA_EXCLUDE 151 D <justification start> The timeout value is restored for the next loop. Violation ignored<justification end>*/
		 timeout1 = DIAG_GPIO_IOIM_TIMEOUT;
        /*LDRA_EXCLUDE 151 D <justification start> The timeout value is restored for the next loop. Violation ignored<justification end>*/
		 timeout2 = DIAG_GPIO_IOIM_TIMEOUT;
         
         index += 1U; 
    }
    
    if(DIAG_GPIO_IOIM_GetStatus() == 0x00000000U)
    {
        DIAG_GPIO_SetRetValue(DIAG_PASS);        
    }
    else
    {
        DIAG_GPIO_SetRetValue(DIAG_FAIL);
    }
    retVal = DIAG_GPIO_GetRetValue();
    return retVal;
}

uint32_t DIAG_GPIO_IOIM_GetStatus(void)
{
    return DIAG_GPIO_IoimInstResult;
}
