RF Channel Selection

There are two methods for selecting the RF channel of the radio transceiver, see section 7.8.2 (RF Channel Selection) of the AT86RF212 datasheet.

Parameters:
ccband RF channel band:
{0} for IEEE 802.15.4 RF channels;
{1,...,5} for user-defined RF channels;
channel Number of an IEEE 802.15.4 RF channel: {0,...,10};
All other values are reserved and must not be used.
ccnumber center frequency index:
{0,...,255} for ccband={1,2,3};
{0,...,94} for ccband=4;
{0,...,102} for ccband=5;
All other values are reserved and must not be used

IEEE 802.15.4 RF Channel Selection

The radio transceiver can be configured to send and receive on the IEEE 802.15.4 RF channels 0 to 10.

Note:
When using IEEE 802.15.4 RF channels for radio transceiver operation, it has to be ensured, that in the subregister SR_CC_BAND the value ccband=0 is stored. Unless the value of the parameter ccband is not changed by the software, an explicit write of this subregister can ommited in the use cases PHY_SET_CHANNEL and PHY_SET_CHANNEL_LOCK.
Use Cases:

User-defined RF Channel Selection

The radio transceiver can be configured to send and receive on user-defined RF channels in the range from 779 - 935 MHz according to table 7-34 (Frequency Bands and Numbers) in the AT86RF212 datasheet.

Use Cases:


PHY_SET_CHANNEL

A IEEE-802.15.4 RF channel is set by writing the channel number to the sub register SR_CHANNEL.

inline_mscgraph_10
Code example
    /* AT86RF212::TRX_OFF */
    trx_bit_write(SR_CC_BAND, 0);
    trx_bit_write(SR_CHANNEL, channel);

PHY_SET_CHANNEL_LOCK

If the channel is set in one of the states [PLL_ACTIVE], after writing the sub register SR_CHANNEL the TRX_IRQ_PLL_LOCK interrupt is generated, if a channel number which is different from the current channel number, is written to the radio transceiver. This sequence can be used to ensure, whether the PLL has locked to the new frequency.

Note:
For each write access to one of the sub registers SR_CC_BAND and SR_CHANNEL a separate TRX_IRQ_PLL_LOCK interrupt may occur.
inline_mscgraph_11
Code example
    /* AT86RF212::[PLL_ACTIVE] */
    trx_bit_write(SR_CC_BAND, 0);
    trx_bit_write(SR_CHANNEL, channel);
    delay(tTR20);

PHY_GET_CHANNEL

It is checked, that the parameter ccband has the value 0, in order to ensure, that the value read from sub register SR_CHANNEL is valid. The channel number can be read at any time without affecting any ongoing transactions (send, receive).

inline_mscgraph_12
Code example
    /* AT86RF212::[ACTIVE] */
    ccband = trx_bit_read(SR_CC_BAND);
    ASSERT(ccband==0);
    channel = trx_bit_read(SR_CHANNEL);

PHY_SET_FREQ

An user-defined center frequency is set by configuring the sub registers SR_CC_NUMBER and SR_CC_BAND.

inline_mscgraph_13
Code example
    /* AT86RF212::TRX_OFF */
    trx_bit_write(SR_CC_BAND, ccband);
    trx_bit_write(SR_CC_NUMBER, ccnumber);

PHY_SET_FREQ_LOCK

If a new user-defined center frequency is configured in one of the states [PLL_ACTIVE], a TRX_IRQ_PLL_LOCK interrupt is generated after writing the sub register SR_CC_BAND. This sequence can be used to ensure, whether the PLL has locked to the new frequency.

Note:
For each write access to one of the sub registers SR_CC_BAND and SR_CC_NUMBER a separate TRX_IRQ_PLL_LOCK interrupt may occur.
inline_mscgraph_14
Code example
    /* AT86RF212::[PLL_ACTIVE] */
    trx_bit_write(SR_CC_BAND, ccband);
    trx_bit_write(SR_CC_NUMBER, ccnumber);
    delay(tTR20);

PHY_GET_FREQ

It is checked, that the parameter ccband is not 0, in order to ensure, that the value read from sub register SR_CC_NUMBER is valid. The value from the sub registers SR_CC_NUMBER and SR_CC_BAND can be read at any time without affecting any transaction.

inline_mscgraph_15
Code example
    /* AT86RF212::[ACTIVE] */
    ccband = trx_bit_read(SR_CC_BAND);
    ASSERT(ccband!=0);
    ccnumber = trx_bit_read(SR_CC_NUMBER);

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