PLL Handling

This section describes, how PLL events are handled and how the PLL status is retrieved. A locked PLL is mandatory for any receive or transmit operation. Locking and unlocking of the PLL are signaled with the interrupts TRX_IRQ_PLL_LOCK and TRX_IRQ_PLL_UNLOCK. For a more detailed decription on PLL locking/unlocking conditions refer to section 7.8.5 (Interrupt Handling) of the AT86RF212 datasheet.

The PLL status can be read from the sub register SR_PLL_LOCK_CP with the sequence GET_PLL_STATUS. The unlocking of the PLL is a critical event, if it occurs during the reception or transmission of a frame (see PHY_UNLOCK_PLL). Generally, a test of the PLL locking can be done with a state transition from TRX_OFF to PLL_ON (see PHY_STATE_TRX_OFF__PLL_ON.

Parameters:

pllstat

This parameter has the value 1, if the PLL is locked to the programmed center frequency (see RF Channel Selection), otherwise it is 0.

Use Cases:

GET_PLL_STATUS

Code example

    /* AT86RF212::[ACTIVE] */
    pllstat = trx_bit_read(SR_PLL_LOCK_CP);

PHY_UNLOCK_PLL

If the TRX_IRQ_PLL_UNLOCK interrupt occurs during a frame transmission or reception, this transaction has failed. The higher software layers should handle this error the same way like a normal transmission error. As long as the PLL is unlocked (see also GET_PLL_STATUS), no transmission and reception of frames is possible.

The unlocking of the PLL is a critical error, if it occurs in one of the [PLL_ACTIVE] states and no TRX_IRQ_PLL_LOCK interrupt follows after a TRX_IRQ_PLL_UNLOCK interrupt within the time tLockCrit.

In this case, the software should try to execute the sequence PHY_STATE_TRX_OFF__PLL_ON in order to force the PLL to lock.

Code example

    /* AT86RF212::[PLL_ACTIVE] */
    /* TRX_IRQ_PLL_UNLOCK occurs here */
    handle_unlock();