CLKM Frequency Change

This section describes, how the frequency of the CLKM signal is controlled. The CLKM signal is available at pin TRX_PIN_CLKM in all states except SLEEP, RX_ON_NOCLK, RX_AACK_ON_NOCLK, BUSY_RX_AACK_NOCLK. The frequency of the CLKM signal can be modified in two ways:

Parameters:
clkrate This parameter represents the frequency value of the CLKM signal, which is generated at pin TRX_PIN_CLKM (see table below).

CLKM Frequencies

clkrate fCLKM
0 OFF, CLKM = LOW.
1 1 MHz
2 2 MHz
3 4 MHz
4 8 MHz
5 16 MHz
6 1/4 MHz=250 kHz
7 IEEE 802.15.4 symbol rate
  • BPSK_20 : 20 kHz
  • BPSK_40 : 40 kHz
  • O-QPSK_{100,200,400} : 25 kHz
  • O-QPSK_{250,500,1000} : 62.5 kHz

Use Cases:


PHY_CHANGE_CLKM_FAST

With this sequence, the clock signal at TRX_PIN_CLKM is changed immediately.

inline_mscgraph_22
Code example
    /* AT86RF212::[ACTIVE] */
    trx_bit_write(SR_CLKM_SHA_SEL, 0);
    trx_bit_write(SR_CLKM_CTRL, clkrate);

PHY_CHANGE_CLKM_SAFE

With this sequence, the clock signal at TRX_PIN_CLKM changes after awake, if the value of the parameter clkrate is not {0,6,7}.

Note:
The prep_clkchange() function is MCU dependent and is responsible to bring the MCU to a state, where a clock change is allowed. After asserting TRX_PIN_SLP_TR = HIGH, the CLKM signal delivers 35 (refer to tTR3) cycles before it is turned off (CLKM = LOW, see also PHY_STATE_TRX_OFF__SLEEP).
inline_mscgraph_23
Code example
    /* AT86RF212::TRX_OFF */
    trx_bit_write(SR_CLKM_SHA_SEL, 1);
    trx_bit_write(SR_CLKM_CTRL, clkrate);
    trx_pinset_slptr(1);
    /* AT86RF212::SLEEP */
    prep_clkchange();
    trx_pinset_slptr(0);
    delay(tTR2);
    /* AT86RF212::TRX_OFF */

Generated on Mon Aug 17 13:34:59 2009 for SWPM AT86RF212 by  doxygen 1.5.6