| clkrate | This parameter represents the frequency value of the CLKM signal, which is generated at pin TRX_PIN_CLKM (see table below). |
| clkrate | fCLKM |
|---|---|
| 0 | OFF, CLKM = LOW. |
| 1 | 1 MHz |
| 2 | 2 MHz |
| 3 | 4 MHz |
| 4 | 8 MHz |
| 5 | 16 MHz |
| 6 | 1/4 MHz=250 kHz |
| 7 | IEEE 802.15.4 symbol rate
|
Use Cases:
/* AT86RF212::[ACTIVE] */ trx_bit_write(SR_CLKM_SHA_SEL, 0); trx_bit_write(SR_CLKM_CTRL, clkrate);
prep_clkchange() function is MCU dependent and is responsible to bring the MCU to a state, where a clock change is allowed. After asserting TRX_PIN_SLP_TR = HIGH, the CLKM signal delivers 35 (refer to tTR3) cycles before it is turned off (CLKM = LOW, see also PHY_STATE_TRX_OFF__SLEEP).
/* AT86RF212::TRX_OFF */ trx_bit_write(SR_CLKM_SHA_SEL, 1); trx_bit_write(SR_CLKM_CTRL, clkrate); trx_pinset_slptr(1); /* AT86RF212::SLEEP */ prep_clkchange(); trx_pinset_slptr(0); delay(tTR2); /* AT86RF212::TRX_OFF */
1.5.6