| txcrc | If set to 1, the CRC is calculated automatically, otherwise, the frame will be transmitted as it was downloaded. | |
| frame_retr | Number of attempts until giving up sending a frame sucessfully. The parameter has the range 0 ... 15, with the following meaning:
| |
| lbt | Flag which determines, that LBT method should be used instead of CSMA. | |
| csma_retr | Number of maximum CSMA attempts before giving up sending a frame. The parameter has the range {0...7} with the following meaning:
| |
| csma_seed | The seed value for the random number generator of the CSMA-CA algorithm. | |
| min_be | Value of the minimum backoff exponent in the CSMA-CA algorithm. | |
| max_be | Value of the maximum backoff exponent in the CSMA-CA algorithm. |
csma_retr channel assessments before sending a frame or giving up. In LBT mode the number of CSMA attempts is inifinite and therefore the parameters csma_retr, csma_seed, min_be, and max_be are ignored. In the case of a permanently blocked channel, the CSMA mode terminates with a TRX_IRQ_TRX_END interrupt and the result TRAC_CHANNEL_ACCESS_FAILURE in the sub register SR_TRAC_STATUS. Under the same conditions, the LBT mode never terminates with any interrupt, continuously trying to detect that the channel is idle.
/* AT86RF212::[CONFIG] */ trx_bit_write(SR_TX_AUTO_CRC_ON, txcrc); trx_bit_write(SR_MAX_FRAME_RETRIES, frame_rctr); trx_bit_write(SR_CSMA_LBT_MODE, lbt); trx_bit_write(SR_MAX_CSMA_RETRIES, csma_rctr); trx_bit_write(SR_MIN_BE, min_be); trx_bit_write(SR_MAX_BE, max_be);
The following use case illustrates the initialisation of the CSMA seed with a wake-sleep-wake sequence (see also Transitions to/from State SLEEP).
The splitting of the parameters into register values is described in section Handling of Multibyte Variables.
/* AT86RF212::TRX_OFF */ trx_bit_write(SR_CSMA_SEED_1, csma_seed_10_8); trx_reg_write(RG_CSMA_SEED_0, csma_seed_7_0); trx_pinset_slptr(1); delay(tTR3); /* AT86RF212::SLEEP */ trx_pinset_slptr(0); delay(tTR2); /* AT86RF212::TRX_OFF */
The result of a TX_ARET transaction is stored in the sub register SR_TRAC_STATUS after the TRX_IRQ_TRX_END interrupt.
| tracstat | Result of a TX_ARET transaction from sub register SR_TRAC_STATUS.
|
= CCA =:=== TX ===:============== RX ====================
0 72 80 88 96 104 112 120 [BPSK]
0 42 44 46 48 50 52 54 [O-QPSK]
|~~~~~~+---| |---+---+---+---+---+---+---| time [symbols]
-------| | F |----------|SFD|PHR| ACK | FCS |------------------------->
|~~~~~~+---| |---o---+---+---+---+---+---|
| | | |
t0 t1 t2 t3
F = last transmitted byte,
SFD, PHR, ACK, FCS = data of the received ACK frame
/* AT86RF212::TX_ARET_ON */ trx_pinset_slptr(1); delay(t7); /* AT86RF212::BUSY_TX_ARET */ trx_pinset_slptr(0); trx_frame_write(len(frame), frame); /* TRX_IRQ_TRX_END occurs here */ /* AT86RF212::TX_ARET_ON */ tracstat = trx_bit_read(SR_TRAC_STATUS);
1.5.6