Nevertheless, this sequence can be safely executed from any state.
If the Awake Interrupt is explicitely enabled before writing CMD_TRX_OFF, the interrupt occurs, when the radio transceiver has reached the state TRX_OFF.
| clkrst | A constant with value 0x19, which represents
|
/* AT86RF212::P_ON */ trx_pinset_slptr(0); trx_pinset_reset(1); delay_us(400); trx_pinset_reset(0); delay(t10); trx_pinset_reset(1); trx_reg_write(RG_TRX_CTRL_0, clkrst); trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF); delay(tTR13); /* AT86RF212::TRX_OFF */ state = trx_bit_read(SR_TRX_STATUS); ASSERT(state==TRX_OFF);
Because after reset, the interrupt TRX_IRQ_AWAKE_END is disabled, it needs to be explicitely enabled by writing the RG_IRQ_MASK register.
/* AT86RF212::[ACTIVE] */ trx_pinset_reset(0); trx_pinset_slptr(0); delay(t10); trx_pinset_reset(1); trx_reg_write(RG_IRQ_MASK, TRX_IRQ_AWAKE_END); delay(tTR13); /* AT86RF212::TRX_OFF */ state = trx_bit_read(SR_TRX_STATUS); ASSERT(state==TRX_OFF);
All other register values (channel, power, ...) of the radio transceiver will not be affected by this procedure.
The state machine reset is identical to the procedure described in PHY_FORCE_[ACTIVE]__TRX_OFF.
/* AT86RF212::[ACTIVE] */ trx_pinset_slptr(0); trx_bit_write(SR_TRX_CMD, CMD_FORCE_TRX_OFF); delay(tTR12); /* AT86RF212::TRX_OFF */ trxstat = trx_bit_read(SR_TRX_STATUS); ASSERT(trxstat==TRX_OFF);
1.5.6