bldc.h File Reference

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Detailed Description

This file contains the function declarations.

• Compiler: IAR EWAVR and GNU GCC for AVR
• Supported devices: ATTiny861,ATTiny461,ATTiny261

Author:

Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file bldc.h.

#include "config.h"

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Defines
#define	ADC_PRESCALER   ADC_PRESCALER_8
	ADC prescaler used.
#define	ADC_RES_ALIGNMENT_BEMF   (0 << ADLAR)
	ADC result alignment for BEMF measurement.
#define	ADC_RES_ALIGNMENT_CURRENT   (0 << ADLAR)
	ADC result alignment for CURRENT measurement.
#define	ADC_RES_ALIGNMENT_REF_VOLTAGE   (0 << ADLAR)
	ADC result alignment for reference voltage measurement.
#define	ADC_RES_ALIGNMENT_SPEED_REF   (0 << ADLAR)
	ADC result alignment for speed reference measurement.
#define	ADC_TRIGGER_SOURCE   ((1 << ADTS2) | (1 << ADTS1) | (0 << ADTS0))
	ADC trigger source: TC1 Overflow.
#define	ADC_ZC_THRESHOLD   371
	Zero-cross threshold.
#define	ADMUX_PA1   ((0 << MUX2) | (0 << MUX1) | (1 << MUX0))
#define	ADMUX_PA2   ((0 << MUX2) | (1 << MUX1) | (0 << MUX0))
#define	ADMUX_PA4   ((0 << MUX2) | (1 << MUX1) | (1 << MUX0))
#define	ADMUX_PA5   ((1 << MUX2) | (0 << MUX1) | (0 << MUX0))
#define	ADMUX_PA7   ((1 << MUX2) | (1 << MUX1) | (1 << MUX0))
#define	ADMUX_REF_VOLTAGE   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_REF_VOLTAGE | ADC_MUX_SPEED_REF)
	ADMUX register value for reference voltage sampling.
#define	ADMUX_SPEED_REF   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_SPEED_REF | ADC_MUX_SPEED_REF)
	ADMUX register value for speed reference sampling.
#define	ADMUX_U   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_U)
	ADMUX register value for channel U sampling.
#define	ADMUX_V   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_V)
	ADMUX register value for channel V sampling.
#define	ADMUX_W   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_W)
	ADMUX register value for channel W sampling.
#define	CCW   1
	Counterclockwise rotation flag. Used only in macros.
#define	CW   0
	Clockwise rotation flag. Used only in macros.
#define	DRIVE_PATTERN_STEP1_CCW   ((1 << UL) | (1 << VH))
	Drive pattern for commutation step 1, CCW rotation.
#define	DRIVE_PATTERN_STEP1_CW   ((1 << VH) | (1 << WL))
	Drive pattern for commutation step 1, CW rotation.
#define	DRIVE_PATTERN_STEP2_CCW   ((1 << UL) | (1 << WH))
	Drive pattern for commutation step 2, CCW rotation.
#define	DRIVE_PATTERN_STEP2_CW   ((1 << UH) | (1 << WL))
	Drive pattern for commutation step 2, CW rotation.
#define	DRIVE_PATTERN_STEP3_CCW   ((1 << VL) | (1 << WH))
	Drive pattern for commutation step 3, CCW rotation.
#define	DRIVE_PATTERN_STEP3_CW   ((1 << UH) | (1 << VL))
	Drive pattern for commutation step 3, CW rotation.
#define	DRIVE_PATTERN_STEP4_CCW   ((1 << VL) | (1 << UH))
	Drive pattern for commutation step 4, CCW rotation.
#define	DRIVE_PATTERN_STEP4_CW   ((1 << WH) | (1 << VL))
	Drive pattern for commutation step 4, CW rotation.
#define	DRIVE_PATTERN_STEP5_CCW   ((1 << WL) | (1 << UH))
	Drive pattern for commutation step 5, CCW rotation.
#define	DRIVE_PATTERN_STEP5_CW   ((1 << WH) | (1 << UL))
	Drive pattern for commutation step 5, CW rotation.
#define	DRIVE_PATTERN_STEP6_CCW   ((1 << WL) | (1 << VH))
	Drive pattern for commutation step 6, CCW rotation.
#define	DRIVE_PATTERN_STEP6_CW   ((1 << VH) | (1 << UL))
	Drive pattern for commutation step 6, CW rotation.
#define	EDGE_FALLING   1
	Zero crossing polarity flag value for falling zero crossing.
#define	EDGE_RISING   0
	Zero crossing polarity flag value for rinsing zero crossing.
#define	MAX_PWM_COMPARE_VALUE   PWM_TOP_VALUE
	The maximum allowed PWM compare value.
#define	MIN_PWM_COMPARE_VALUE   160
	The minimum allowed PWM compare value.
#define	PWM_TOP_VALUE   255
	Top value for the PWM timer.
#define	SET_TIMER0_INT_COMMUTATION   SET_TIMER0_COMPA_INT
	Macro that enable Timer/Counter0 interrupt responsible for commutation.
#define	STARTUP_PWM_COMPARE_VALUE   140
	PWM compare value used during startup.

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Define Documentation

#define ADC_PRESCALER   ADC_PRESCALER_8

ADC prescaler used.

Definition at line 148 of file bldc.h.

Referenced by MotorPWMBottom().

#define ADC_RES_ALIGNMENT_BEMF   (0 << ADLAR)

ADC result alignment for BEMF measurement.

Definition at line 121 of file bldc.h.

#define ADC_RES_ALIGNMENT_CURRENT   (0 << ADLAR)

ADC result alignment for CURRENT measurement.

Definition at line 127 of file bldc.h.

#define ADC_RES_ALIGNMENT_REF_VOLTAGE   (0 << ADLAR)

ADC result alignment for reference voltage measurement.

Definition at line 130 of file bldc.h.

#define ADC_RES_ALIGNMENT_SPEED_REF   (0 << ADLAR)

ADC result alignment for speed reference measurement.

Definition at line 124 of file bldc.h.

#define ADC_TRIGGER_SOURCE   ((1 << ADTS2) | (1 << ADTS1) | (0 << ADTS0))

ADC trigger source: TC1 Overflow.

Definition at line 151 of file bldc.h.

Referenced by ADCInit().

#define ADC_ZC_THRESHOLD   371

Zero-cross threshold.

Definition at line 154 of file bldc.h.

Referenced by MotorPWMBottom().

#define ADMUX_PA1   ((0 << MUX2) | (0 << MUX1) | (1 << MUX0))

Definition at line 115 of file bldc.h.

#define ADMUX_PA2   ((0 << MUX2) | (1 << MUX1) | (0 << MUX0))

Definition at line 116 of file bldc.h.

#define ADMUX_PA4   ((0 << MUX2) | (1 << MUX1) | (1 << MUX0))

Definition at line 117 of file bldc.h.

#define ADMUX_PA5   ((1 << MUX2) | (0 << MUX1) | (0 << MUX0))

Definition at line 118 of file bldc.h.

#define ADMUX_PA7   ((1 << MUX2) | (1 << MUX1) | (1 << MUX0))

Definition at line 114 of file bldc.h.

#define ADMUX_REF_VOLTAGE   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_REF_VOLTAGE | ADC_MUX_SPEED_REF)

ADMUX register value for reference voltage sampling.

Definition at line 142 of file bldc.h.

Referenced by ADCInit().

#define ADMUX_SPEED_REF   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_SPEED_REF | ADC_MUX_SPEED_REF)

ADMUX register value for speed reference sampling.

Definition at line 145 of file bldc.h.

Referenced by MotorPWMBottom().

#define ADMUX_U   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_U)

ADMUX register value for channel U sampling.

Definition at line 133 of file bldc.h.

#define ADMUX_V   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_V)

ADMUX register value for channel V sampling.

Definition at line 136 of file bldc.h.

#define ADMUX_W   (ADC_REF_CHANNEL | ADC_RES_ALIGNMENT_BEMF | ADC_MUX_W)

ADMUX register value for channel W sampling.

Definition at line 139 of file bldc.h.

#define CCW   1

Counterclockwise rotation flag. Used only in macros.

Definition at line 61 of file bldc.h.

#define CW   0

Clockwise rotation flag. Used only in macros.

Definition at line 58 of file bldc.h.

#define DRIVE_PATTERN_STEP1_CCW   ((1 << UL) | (1 << VH))

Drive pattern for commutation step 1, CCW rotation.

Definition at line 64 of file bldc.h.

#define DRIVE_PATTERN_STEP1_CW   ((1 << VH) | (1 << WL))

Drive pattern for commutation step 1, CW rotation.

Definition at line 83 of file bldc.h.

#define DRIVE_PATTERN_STEP2_CCW   ((1 << UL) | (1 << WH))

Drive pattern for commutation step 2, CCW rotation.

Definition at line 67 of file bldc.h.

#define DRIVE_PATTERN_STEP2_CW   ((1 << UH) | (1 << WL))

Drive pattern for commutation step 2, CW rotation.

Definition at line 86 of file bldc.h.

#define DRIVE_PATTERN_STEP3_CCW   ((1 << VL) | (1 << WH))

Drive pattern for commutation step 3, CCW rotation.

Definition at line 70 of file bldc.h.

#define DRIVE_PATTERN_STEP3_CW   ((1 << UH) | (1 << VL))

Drive pattern for commutation step 3, CW rotation.

Definition at line 89 of file bldc.h.

#define DRIVE_PATTERN_STEP4_CCW   ((1 << VL) | (1 << UH))

Drive pattern for commutation step 4, CCW rotation.

Definition at line 73 of file bldc.h.

#define DRIVE_PATTERN_STEP4_CW   ((1 << WH) | (1 << VL))

Drive pattern for commutation step 4, CW rotation.

Definition at line 92 of file bldc.h.

#define DRIVE_PATTERN_STEP5_CCW   ((1 << WL) | (1 << UH))

Drive pattern for commutation step 5, CCW rotation.

Definition at line 76 of file bldc.h.

#define DRIVE_PATTERN_STEP5_CW   ((1 << WH) | (1 << UL))

Drive pattern for commutation step 5, CW rotation.

Definition at line 95 of file bldc.h.

#define DRIVE_PATTERN_STEP6_CCW   ((1 << WL) | (1 << VH))

Drive pattern for commutation step 6, CCW rotation.

Definition at line 79 of file bldc.h.

#define DRIVE_PATTERN_STEP6_CW   ((1 << VH) | (1 << UL))

Drive pattern for commutation step 6, CW rotation.

Definition at line 98 of file bldc.h.

#define EDGE_FALLING   1

Zero crossing polarity flag value for falling zero crossing.

Definition at line 52 of file bldc.h.

Referenced by MotorPWMBottom().

#define EDGE_RISING   0

Zero crossing polarity flag value for rinsing zero crossing.

Definition at line 55 of file bldc.h.

Referenced by MotorPWMBottom().

#define MAX_PWM_COMPARE_VALUE   PWM_TOP_VALUE

The maximum allowed PWM compare value.

Definition at line 107 of file bldc.h.

#define MIN_PWM_COMPARE_VALUE   160

The minimum allowed PWM compare value.

Definition at line 104 of file bldc.h.

Referenced by mc_regulation_loop().

#define PWM_TOP_VALUE   255

Top value for the PWM timer.

Definition at line 101 of file bldc.h.

Referenced by PWMInit().

#define SET_TIMER0_INT_COMMUTATION   SET_TIMER0_COMPA_INT

Macro that enable Timer/Counter0 interrupt responsible for commutation.

Definition at line 157 of file bldc.h.

Referenced by MotorPWMBottom().

#define STARTUP_PWM_COMPARE_VALUE   140

PWM compare value used during startup.

Definition at line 110 of file bldc.h.

Referenced by mc_start_motor().

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