PWM.c

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/* This file has been prepared for Doxygen automatic documentation generation.*/
#include <ioavr.h>

#include "enums.h"

#include "main.h"
#include "PWM.h"
#include "time.h"


//******************************************************************************
// Functions
//******************************************************************************
void PWM_Stop(void)
{
        OCR1B = 0;  // Reset compare level.
        PLLCSR = 0; // Disable PLL, switch to synchronous CLK mode.
        TCCR1A = 0; // Set normal port operation, disable PWM modes.
        TCCR1B = 0; // Stop timer/counter1.
        TCCR1C = 0; // Set normal port operation.
        TCCR1D = 0; // No fault protection, normal waveform.
        OCR1C = 0;  // Reset compare.
        OCR1D = 0;  // Reset compare.
        DT1 = 0;    // No dead time values.
}


void PWM_Start(void)
{
        // Clear OC1B on compare match, enable PWM on comparator OCR1B.
        TCCR1A = (1<<COM1B1)|(0<<COM1B0)|(1<<PWM1B);
        
        // Non-inverted PWM, T/C stopped.
        TCCR1B = 0;
        
        // Copy shadow bits, disconnect OC1D.
        TCCR1C = (TCCR1A & 0xF0);
        
        // No fault protection, use phase & frequency correct PWM.
        TCCR1D = (0<<WGM11)|(1<WGM10);
        
        // Does not matter -- PWM6 mode not used.
        TCCR1E = 0;
        
        // Does not matter -- OC1A is disabled.
        OCR1A = 0;
        
        // Set reset compare level. (Offset is used, or JumperCheck() will fail.)
        OCR1B = PWM_OFFSET;
        
        // TOP value for PWM, f(PWM) = 64MHz / 255 = 251kHz.
        OCR1C = 0xFF;
        
        // Does not matter -- OC1D is disabled.
        OCR1D = 0;
        
        // No dead time values.
        DT1 = 0;
        
        // Set PWM port pin to output.
        DDRB |= (1<<PB3);
        
        // Enable PLL, use full speed mode.
        PLLCSR = (0<<LSM) | (1<<PLLE);
        
        // Use general timer and wait 1 ms for PLL lock to settle.
        Time_Set(TIMER_GEN,0,0,1);
        do{ 
        }while(Time_Left(TIMER_GEN));
        
        // Now wait for PLL to lock.
        do{ 
        }while((PLLCSR & (1<<PLOCK)) == 0);

        // Use PLL as clock source.
        PLLCSR |= (1<<PCKE);
        
        // CLK PCK = 64MHz / 1 = 64MHz.
        TCCR1B |= (0<<CS13)|(0<<CS12)|(0<<CS11)|(1<<CS10);
}


unsigned char PWM_IncrementDutyCycle(void){

        if (OCR1B < PWM_MAX) {
                OCR1B += 1;
                return(TRUE);
        } else {
                return(FALSE);
        }
}


unsigned char PWM_DecrementDutyCycle(void){
        
        if (OCR1B > 0)  {
                OCR1B -= 1;
                return(TRUE);
        } else {
                return(FALSE);
        }
}

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