pico_power_uc3l064.c

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/*This file has been prepared for Doxygen automatic documentation generation.*/
#include "board.h"
#include "gpio.h"
#include "scif_uc3l.h"
#include "power_clocks_lib.h"



#define   EXAMPLE_FDFLL_KHZ     50000
#define   EXAMPLE_FDFLL_HZ      50000000

 volatile int i;
 volatile avr32_scif_t * SCIF = &AVR32_SCIF;
 volatile avr32_ast_t * AST = &AVR32_AST;
 U8 *avr32_sram=AVR32_SRAM;
 
// Before entering a sleep mode, set R2 to 0x10000000 to avoid extra 40ua (related to scan issue on UC3L revB).
#define PM_SLEEP(sleep_mode)  {__asm__ __volatile__ (\
        "MOV    R2, 0\n\t"\
        "SBR    R2, 28\n\t"\
        "sleep "STRINGZ(sleep_mode));}

// Extra hw setup for UC3L revB: PA21 and PB10 grounded and removed LED0 & LED1.
// PA11 grounded.



static void local_start_dfll_clock(void)
{
  scif_dfll_closedloop_conf_t DfllConfig;
  scif_gclk_opt_t             GcConf;
  

  // 1) Configure and start the DFLL main reference generic clock:
  // use the undivided RCOSC slow clock as source for the generic clock. The
  // generic clock frequency will thus be ~115kHz.
  GcConf.clock_source = SCIF_GCCTRL_CLK32;
  GcConf.diven = OFF;
  // Note: this function will start the AVR32_SCIF_GCLK_DFLL0_REF generic clock
  // (i.e. the generic clock dedicated to be the DFLL main reference clock).
  scif_dfll0_closedloop_mainref_gc_enable(&GcConf);
  
  // 2) Configure and start the DFLL.
  // The coarse value (= (fDFLL - SCIF_DFLL_MINFREQ_KHZ)*255/(SCIF_DFLL_MAXFREQ_KHZ - SCIF_DFLL_MINFREQ_KHZ))
  DfllConfig.coarse = ((unsigned long long)(EXAMPLE_FDFLL_HZ - SCIF_DFLL_MINFREQ_HZ)*255)/(SCIF_DFLL_MAXFREQ_HZ - SCIF_DFLL_MINFREQ_HZ);
  // The fmul value (= (fDFLL*2^16)/fref, with fref being the frequency of the
  // DFLL main reference generic clock)
  DfllConfig.fmul = ((unsigned long long)EXAMPLE_FDFLL_HZ<<16)/SCIF_RC32K_FREQ_HZ;
  // The maxstep value
  DfllConfig.maxstep = 1;
  scif_dfll0_closedloop_start(&DfllConfig);
}
// set flash wait state enabled
void flashc_set_wait_state(void)
{
  volatile  avr32_flashcdw_t * AVR32_FLASHC = &AVR32_FLASHCDW;
  AVR32_FLASHC->fcr=AVR32_FLASHC->fcr|0x0040;
  //u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
  //u_avr32_flashc_fcr.FCR.fws = wait_state;
  //AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
}
//Flash high speed mode enabled
void flashc_hsben_command(void)
{
  volatile  avr32_flashcdw_t * AVR32_FLASHC = &AVR32_FLASHCDW;
  //flashc_wait_until_ready();
  while ((AVR32_FLASHC->fsr & 0x01)==0);
  AVR32_FLASHC->fcmd = 0xA5000010;//High Speed Mode Enable
  //flashc_wait_until_ready();
   while ((AVR32_FLASHC->fsr & 0x01)==0);
}

// enable port0 pull up except PA11,PA13,PA20,PA21
void gpio_enable_port0_pull_up(void)
{
  volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[0];
  gpio_port->puers =0x004FD7FF;
}
// enable port1 pull up except PB05,PB10
void gpio_enable_port1_pull_up(void)
{
  volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[1];
  gpio_port->puers =0x00001BDF;
}

// config the port0,port1 and the leds
void gpio_configuration(void)
{
  gpio_enable_port0_pull_up();
  gpio_enable_port1_pull_up();

  gpio_clr_gpio_pin(AVR32_PIN_PA11);
  gpio_clr_gpio_pin(AVR32_PIN_PB05);
  gpio_clr_gpio_pin(AVR32_PIN_PA20);
  gpio_clr_gpio_pin(AVR32_PIN_PA13);
}

//Enable OSC32crystal
void enableOSC32crystal(int pinsel, int mode, int startup)
{
  union {
    unsigned long               oscctrl32;
    avr32_scif_oscctrl32_t       OSCCTRL32;
  } oscctrl32 ;
  union {
    unsigned long               icr;
    avr32_scif_icr_t            ICR;
  } icr;  
  
  // Read register
  oscctrl32.oscctrl32 = AVR32_SCIF.oscctrl32;
  // Modify
  oscctrl32.OSCCTRL32.osc32en = 1;
  oscctrl32.OSCCTRL32.startup = startup;
  oscctrl32.OSCCTRL32.mode = mode;
  oscctrl32.OSCCTRL32.en32k = 1;
  oscctrl32.OSCCTRL32.en1k = 0;
  oscctrl32.OSCCTRL32.pinsel = pinsel;
  AVR32_SCIF.oscctrl32 = oscctrl32.oscctrl32;
  while(((AVR32_SCIF.isr)&AVR32_SCIF_ISR_OSC32RDY_MASK)!=AVR32_SCIF_ISR_OSC32RDY_MASK);
  icr.icr = 0;
  icr.ICR.osc32rdy = 1;
  AVR32_SCIF.icr = icr.icr;
}
//enable the RTC32k and AST
void enable_rtc32k_ast(void)
{
  enableOSC32crystal(0, 1, 5);          //enable the RTC
  AVR32_AST.clock = 0x100;      // CLK CSEL
  while((AVR32_AST.sr & 0x10000000));   // Wait on clkbusy
  AVR32_AST.clock = 0x101;      // Enable clk
  while((AVR32_AST.sr & 0x10000000));   // Wait on clkbusy  
  AVR32_AST.cv = 0;
  while((AVR32_AST.sr & 0x01000000)); 
  AVR32_AST.cr = 0x00000100;
  while((AVR32_AST.sr & 0x01000000)); 
  AVR32_AST.ar0 = 0x3FFFF;
  while((AVR32_AST.sr & 0x01000000));   
  AVR32_AST.wer = 0x100;
  while((AVR32_AST.sr & 0x01000000));   
  AVR32_AST.cr |= 1;
  while((AVR32_AST.sr & 0x01000000)); 
}
//disable tht AST
void disable_ast(void)
{
   AST->cr=AST->cr&0xFFFFFFFE;//disable the ast
}

//disable the Regulator and POR33
void disable_por33_regulator(void)
{
  SCIF->unlock=0xAA00006C;
  SCIF->rc32kcr=0x01;
    
  SCIF->unlock=0xAA000044;
  SCIF->vregcr=0x00090807;
  while(SCIF->vregcr&0x00040000!=0x00040000); 
   
  SCIF->unlock=0xAA000044;
  SCIF->vregcr=0x00190807;   
  while(SCIF->vregcr&0x00100000!=0x00100000);
  SCIF->unlock=0xAA00006C;
  SCIF->rc32kcr=0x00;
}
// choose the Reset Pullup, active low mode
void pm_ppcr_rstpun_mode(void)
{
  AVR32_PM.unlock = 0xAA000000 | AVR32_PM_PPCR;
  AVR32_PM.ppcr = 0x0;  
}
//delay ms
void delayms(int ms)
{
  int delay;
  delay=ms;
  for(delay=ms;delay>=0;delay--)
  {
       for(i=10; i>0; i--);
  }
}


/* \brief This is an example that shows how to do the following:
 * - generate a high frequency clock (~24MHz) with a DFLL in closed-loop mode
 * - set-up a generic clock with a DFLL as a source
 * - output the generic clock to GCLK_1_0
 * - go into the frozen sleep mode (while still maintaining GCLK output)
 *
 */
int main(void)
{
  long int ast_value=1;
  ast_value=*(avr32_sram+1);
  if(ast_value==0x00)
  {
    *(avr32_sram+1)=0x01;
    //enable the RTC
    enableOSC32crystal(0, 1, 5);
    // choose the Reset Pullup, active low mode
    pm_ppcr_rstpun_mode(); 
    //config the port0,port1 and the leds
    //port0 pull up except PA11,PA13,PA20,PA21
    //port1 pull up except PB05,PB10
    //clear the four led pins
    gpio_configuration();
    //blink the led 
    gpio_set_gpio_pin(AVR32_PIN_PA11);
    delayms(500);
    gpio_clr_gpio_pin(AVR32_PIN_PA11);
    //disable tht AST   
    disable_ast();
    
    // Generate a high frequency clock with a DFLL in closed-loop mode
    local_start_dfll_clock();
    // set flash wait state enabled
    flashc_set_wait_state();
    // Flash high speed mode enabled
    flashc_hsben_command();
    // Set the division ratio to apply to the main clock to 8 for each clock domain
    pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_PBA, PM_CKSEL_DIVRATIO_8);
    // Switch the main clock source to the DFLL.
    pm_set_mclk_source(PM_CLK_SRC_DFLL0);
    // disable the Regulator and POR33 
    disable_por33_regulator();
    
   while(1);  
  }
if(ast_value==0x01)
  {
   *(avr32_sram+1)=0x02;
    enableOSC32crystal(0, 1, 5);//enable the RTC
    // choose the Reset Pullup, active low mode
    pm_ppcr_rstpun_mode(); 
    //config the port0,port1 and the leds
    //port0 pull up except PA11,PA13,PA20,PA21
    //port1 pull up except PB05,PB10
    //clear the four led pins
    gpio_configuration();
    //blink the led
    gpio_set_gpio_pin(AVR32_PIN_PA13);
    delayms(500);
    gpio_clr_gpio_pin(AVR32_PIN_PA13);

    // Generate a high frequency clock with a DFLL in closed-loop mode
    local_start_dfll_clock();
    // set flash wait state enabled
    flashc_set_wait_state();
    // Flash high speed mode enabled
    flashc_hsben_command();
    // Set the division ratio to apply to the main clock to 8 for each clock domain
    pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_PBA, PM_CKSEL_DIVRATIO_8);
    // Switch the main clock source to the DFLL.
    pm_set_mclk_source(PM_CLK_SRC_DFLL0);
    //disable the Regulator and POR33
    disable_por33_regulator();
    //enter the Idle mode
    PM_SLEEP(0); 
  
   while(1);  
  
  }
if(ast_value==0x02)
  {   
    *(avr32_sram+1)=0x03;
    // choose the Reset Pullup, active low mode
    pm_ppcr_rstpun_mode();   
    //config the port0,port1 and the leds
    //port0 pull up except PA11,PA13,PA20,PA21
    //port1 pull up except PB05,PB10
    //clear the four led pins
    gpio_configuration();
    //blink the led
    gpio_set_gpio_pin(AVR32_PIN_PA20);
    delayms(500);
    gpio_clr_gpio_pin(AVR32_PIN_PA20);
    //disable the Regulator and POR33
    disable_por33_regulator();
    //enable the RTC32k and AST
    enable_rtc32k_ast();
    //enter the static mode with the RTC
    PM_SLEEP(5); 
    // when the static mode waken up by the AST, go to the static mode again
    while(1) 
      {
    AVR32_AST.scr = 0x100;
    while((AVR32_AST.sr & 0x01000000)); 
    //enter the static mode with the RTC
    PM_SLEEP(5); 
      }
   }

if(ast_value==0x03)

  {
    *(avr32_sram+1)=0x00;
    // choose the Reset Pullup, active low mode
    pm_ppcr_rstpun_mode();   
    //config the port0,port1 and the leds
    //port0 pull up except PA11,PA13,PA20,PA21
    //port1 pull up except PB05,PB10
    //clear the four led pins
    gpio_configuration();
    //blink the led
    gpio_set_gpio_pin(AVR32_PIN_PB05);
    delayms(500);
    gpio_clr_gpio_pin(AVR32_PIN_PB05); 
    //disable the Regulator and POR33
    disable_por33_regulator();    
    //disable tht AST
    disable_ast();  
    //stop the osc32
    scif_stop_osc32();
    //enter the static mode without the RTC
    PM_SLEEP(5);  
    while(1);  
  }
else 
   {
    *(avr32_sram+1)=0x01;
   enableOSC32crystal(0, 1, 5);//enable the RTC
    // choose the Reset Pullup, active low mode
    pm_ppcr_rstpun_mode(); 
    //config the port0,port1 and the leds
    //port0 pull up except PA11,PA13,PA20,PA21
    //port1 pull up except PB05,PB10
    //clear the four led pins
    gpio_configuration();
    //blink the led
    gpio_set_gpio_pin(AVR32_PIN_PA11);
    delayms(500);
    gpio_clr_gpio_pin(AVR32_PIN_PA11);
    //disable tht AST  
    disable_ast();
    
    // Generate a high frequency clock with a DFLL in closed-loop mode
    local_start_dfll_clock();
    // set flash wait state enabled
    flashc_set_wait_state();
    //Flash high speed mode enabled
    flashc_hsben_command();
    // Set the division ratio to apply to the main clock to 8 for each clock domain
    pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_PBA, PM_CKSEL_DIVRATIO_8);
    // Switch the main clock source to the DFLL.
    pm_set_mclk_source(PM_CLK_SRC_DFLL0);
    //disable the Regulator and POR33
    disable_por33_regulator();
    
   while(1);  
  }
}

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