# intc.c File Reference

INTC driver for AVR32 UC3. More...

`#include <avr32/io.h>`
`#include "compiler.h"`
`#include "preprocessor.h"`
`#include "intc.h"`

Go to the source code of this file.

## Defines
#define | DECL_INT_LINE_HANDLER_TABLE(GRP, unused) static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
| Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
#define | INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
## Functions
__int_handler | _get_interrupt_handler (unsigned int int_level)
| Gets the interrupt handler of the current event at the int_level interrupt priority level (called from exception.S).
static void | _unhandled_interrupt (void)
| Default interrupt handler.
static __inline__ void | INTC_init_evba (void)
| Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S.
void | INTC_init_interrupts (void)
| Initializes the hardware interrupt controller driver.
void | INTC_register_interrupt (__int_handler handler, unsigned int irq, unsigned int int_level)
| Registers an interrupt handler.
| MREPEAT (AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE,~)
## Variables
void | _evba
struct {
volatile __int_handler * _int_line_handler_table
unsigned int num_irqs
} | _int_handler_table [AVR32_INTC_NUM_INT_GRPS]
| Table containing for each interrupt group the number of interrupt request lines and a pointer to the table of interrupt line handlers.
const unsigned int | ipr_val [AVR32_INTC_NUM_INT_LEVELS]
| Values to store in the interrupt priority registers for the various interrupt priority levels.

## Detailed Description

INTC driver for AVR32 UC3.

AVR32 Interrupt Controller driver module.

- Compiler: IAR EWAVR32 and GNU GCC for AVR32
- Supported devices: All AVR32 devices with an INTC module can be used.
- AppNote:

Author:
  Atmel Corporation: http://www.atmel.com
  Support and FAQ: http://support.atmel.no/

Definition in file intc.c.

## Define Documentation

#define DECL_INT_LINE_HANDLER_TABLE | ( | GRP,
|  | unused |  | ) | static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];

Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.

Each line handler table contains a set of pointers to interrupt handlers.

Definition at line 62 of file intc.c.

#define INSERT_INT_LINE_HANDLER_TABLE | ( | GRP,
|  | unused |  | ) | {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},

## Function Documentation

__int_handler _get_interrupt_handler | ( | unsigned int | int_level | ) |

Gets the interrupt handler of the current event at the int_level interrupt priority level (called from exception.S).

Parameters:

  | int_level | Interrupt priority level to handle.

Returns:
  Interrupt handler to execute.

Note:
  Taken and adapted from Newlib.

Definition at line 111 of file intc.c.

References _int_handler_table, and clz.

    00112 {
    00113   // ICR3 is mapped first, ICR0 last.
    00114   // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
    00115   // pass a single argument to a function.
    00116   unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
    00117   unsigned int int_req = AVR32_INTC.irr[int_grp];
    00118
    00119   // As an interrupt may disappear while it is being fetched by the CPU
    00120   // (spurious interrupt caused by a delayed response from an MCU peripheral to
    00121   // an interrupt flag clear or interrupt disable instruction), check if there
    00122   // are remaining interrupt lines to process.
    00123   // If a spurious interrupt occurs, the status register (SR) contains an
    00124   // execution mode and interrupt level masks corresponding to a level 0
    00125   // interrupt, whatever the interrupt priority level causing the spurious
    00126   // event. This behavior has been chosen because a spurious interrupt has not
    00127   // to be a priority one and because it may not cause any trouble to other
    00128   // interrupts.
    00129   // However, these spurious interrupts place the hardware in an unstable state
    00130   // and could give problems in other/future versions of the CPU, so the
    00131   // software has to be written so that they never occur. The only safe way of
    00132   // achieving this is to always clear or disable peripheral interrupts with the
    00133   // following sequence:
    00134   // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
    00135   // 2: Perform the bus access to the peripheral register that clears or
    00136   //    disables the interrupt.
    00137   // 3: Wait until the interrupt has actually been cleared or disabled by the
    00138   //    peripheral. This is usually performed by reading from a register in the
    00139   //    same peripheral (it DOES NOT have to be the same register that was
    00140   //    accessed in step 2, but it MUST be in the same peripheral), what takes
    00141   //    bus system latencies into account, but peripheral internal latencies
    00142   //    (generally 0 cycle) also have to be considered.
    00143   // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
    00144   // Note that steps 1 and 4 are useless inside interrupt handlers as the
    00145   // corresponding interrupt level is automatically masked by IxM (unless IxM is
    00146   // explicitly cleared by the software).
    00147   //
    00148   // Get the right IRQ handler.
    00149   //
    00150   // If several interrupt lines are active in the group, the interrupt line with
    00151   // the highest number is selected. This is to be coherent with the
    00152   // prioritization of interrupt groups performed by the hardware interrupt
    00153   // controller.
    00154   //
    00155   // If no handler has been registered for the pending interrupt,
    00156   // _unhandled_interrupt will be selected thanks to the initialization of
    00157   // _int_line_handler_table_x by INTC_init_interrupts.
    00158   //
    00159   // exception.S will provide the interrupt handler with a clean interrupt stack
    00160   // frame, with nothing more pushed onto the stack. The interrupt handler must
    00161   // manage the `rete' instruction, what can be done thanks to pure assembly,
    00162   // inline assembly or the `__attribute__((__interrupt__))' C function
    00163   // attribute.
    00164   return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
    00165 }

static void _unhandled_interrupt | ( | void |  | ) | `[static]`

Default interrupt handler.

Note:
  Taken and adapted from Newlib.

Definition at line 95 of file intc.c.

References TRUE.

Referenced by INTC_init_interrupts().

    00096 {
    00097   // Catch unregistered interrupts.
    00098   while (TRUE);
    00099 }

static __inline__ void INTC_init_evba | ( | void |  | ) | `[static]`

Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S.

Definition at line 168 of file intc.c.

References _evba, and Set_system_register.

Referenced by INTC_init_interrupts().

    00169 {
    00170   Set_system_register(AVR32_EVBA, (int)&_evba );
    00171 }

void INTC_init_interrupts | ( | void |  | ) |

Initializes the hardware interrupt controller driver.

Note:
  Taken and adapted from Newlib.

Definition at line 173 of file intc.c.

References _int_handler_table, _unhandled_interrupt(), INTC_init_evba(), and ipr_val.

    00174 {
    00175   unsigned int int_grp, int_req;
    00176
    00177   INTC_init_evba();
    00178
    00179   // For all interrupt groups,
    00180   for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
    00181   {
    00182     // For all interrupt request lines of each group,
    00183     for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
    00184     {
    00185       // Assign _unhandled_interrupt as default interrupt handler.
    00186       _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
    00187     }
    00188
    00189     // Set the interrupt group priority register to its default value.
    00190     // By default, all interrupt groups are linked to the interrupt priority
    00191     // level 0 and to the interrupt vector _int0.
    00192     AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
    00193   }
    00194 }

void INTC_register_interrupt | ( | __int_handler | handler,
|  | unsigned int | irq,
|  | unsigned int | int_level |
| ) |  |  |

Registers an interrupt handler.

Parameters:

  | handler | Interrupt handler to register.
  | irq | IRQ of the interrupt handler to register.
  | int_level | Interrupt priority level to assign to the group of this IRQ.

Warning:
  The interrupt handler must manage the `rete' instruction, what can be done thanks to pure assembly, inline assembly or the `__attribute__((__interrupt__))' C function attribute.
  If several interrupt handlers of a same group are registered with different priority levels, only the latest priority level set will be effective.

Note:
  Taken and adapted from Newlib.

Definition at line 197 of file intc.c.

References _int_handler_table, AVR32_INTC_MAX_NUM_IRQS_PER_GRP, and ipr_val.

    00198 {
    00199   // Determine the group of the IRQ.
    00200   unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
    00201
    00202   // Store in _int_line_handler_table_x the pointer to the interrupt handler, so
    00203   // that _get_interrupt_handler can retrieve it when the interrupt is vectored.
    00204   _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
    00205
    00206   // Program the corresponding IPRX register to set the interrupt priority level
    00207   // and the interrupt vector offset that will be fetched by the core interrupt
    00208   // system.
    00209   // NOTE: The _intx functions are intermediate assembly functions between the
    00210   // core interrupt system and the user interrupt handler.
    00211   AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
    00212 }

MREPEAT | ( | AVR32_INTC_NUM_INT_GRPS | ,
|  | DECL_INT_LINE_HANDLER_TABLE | ,
|  | ~ |  |
| ) |  |  |

## Variable Documentation

void _evba

Referenced by INTC_init_evba().

struct { ... } _int_handler_table[AVR32_INTC_NUM_INT_GRPS]`[static]`

Table containing for each interrupt group the number of interrupt request lines and a pointer to the table of interrupt line handlers.

Referenced by _get_interrupt_handler(), INTC_init_interrupts(), and INTC_register_interrupt().

volatile __int_handler* _int_line_handler_table

Definition at line 76 of file intc.c.

const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]

Values to store in the interrupt priority registers for the various interrupt priority levels.

Referenced by INTC_init_interrupts(), and INTC_register_interrupt().

unsigned int num_irqs

Definition at line 75 of file intc.c.