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# compiler.h

Go to the documentation of this file.

    00001 /*This file is prepared for Doxygen automatic documentation generation.*/
    00017 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
    00018  *
    00019  * Redistribution and use in source and binary forms, with or without
    00020  * modification, are permitted provided that the following conditions are met:
    00021  *
    00022  * 1. Redistributions of source code must retain the above copyright notice, this
    00023  * list of conditions and the following disclaimer.
    00024  *
    00025  * 2. Redistributions in binary form must reproduce the above copyright notice,
    00026  * this list of conditions and the following disclaimer in the documentation
    00027  * and/or other materials provided with the distribution.
    00028  *
    00029  * 3. The name of Atmel may not be used to endorse or promote products derived
    00030  * from this software without specific prior written permission.
    00031  *
    00032  * 4. This software may only be redistributed and used in connection with an Atmel
    00033  * AVR product.
    00034  *
    00035  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
    00036  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    00037  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
    00038  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
    00039  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    00040  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    00041  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    00042  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    00043  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    00044  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
    00045  *
    00046  */
    00047
    00048 #ifndef _COMPILER_H_
    00049 #define _COMPILER_H_
    00050
    00051 #if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__)
    00052 #  include <avr32/io.h>
    00053 #endif
    00054 #if (defined __ICCAVR32__)
    00055 #  include <intrinsics.h>
    00056 #endif
    00057 #include "preprocessor.h"
    00058
    00059
    00060 //_____ D E C L A R A T I O N S ____________________________________________
    00061
    00062 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
    00063
    00064 #include <stddef.h>
    00065 #include <stdlib.h>
    00066
    00067
    00068 #if (defined __ICCAVR32__)
    00069
    00074
    00075 #define __asm__             asm
    00076 #define __inline__          inline
    00077 #define __volatile__
    00079
    00080 #endif
    00081
    00082
    00085
    00086 typedef unsigned char           Bool;
    00087 #ifndef __cplusplus
    00088 #if !defined(__bool_true_false_are_defined)
    00089 typedef unsigned char           bool;
    00090 #endif
    00091 #endif
    00092 typedef signed char             S8 ;
    00093 typedef unsigned char           U8 ;
    00094 typedef signed short int        S16;
    00095 typedef unsigned short int      U16;
    00096 typedef signed long int         S32;
    00097 typedef unsigned long int       U32;
    00098 typedef signed long long int    S64;
    00099 typedef unsigned long long int  U64;
    00100 typedef float                   F32;
    00101 typedef double                  F64;
    00102
    00103
    00104
    00107
    00108 typedef Bool                Status_bool_t;
    00109 typedef U8                  Status_t;
    00110
    00111
    00112
    00115
    00116
    00118 typedef union
    00119 {
    00120   S16 s16   ;
    00121   U16 u16   ;
    00122   S8  s8 [2];
    00123   U8  u8 [2];
    00124 } Union16;
    00125
    00127 typedef union
    00128 {
    00129   S32 s32   ;
    00130   U32 u32   ;
    00131   S16 s16[2];
    00132   U16 u16[2];
    00133   S8  s8 [4];
    00134   U8  u8 [4];
    00135 } Union32;
    00136
    00138 typedef union
    00139 {
    00140   S64 s64   ;
    00141   U64 u64   ;
    00142   S32 s32[2];
    00143   U32 u32[2];
    00144   S16 s16[4];
    00145   U16 u16[4];
    00146   S8  s8 [8];
    00147   U8  u8 [8];
    00148 } Union64;
    00149
    00151 typedef union
    00152 {
    00153   S64 *s64ptr;
    00154   U64 *u64ptr;
    00155   S32 *s32ptr;
    00156   U32 *u32ptr;
    00157   S16 *s16ptr;
    00158   U16 *u16ptr;
    00159   S8  *s8ptr ;
    00160   U8  *u8ptr ;
    00161 } UnionPtr;
    00162
    00164 typedef union
    00165 {
    00166   volatile S64 *s64ptr;
    00167   volatile U64 *u64ptr;
    00168   volatile S32 *s32ptr;
    00169   volatile U32 *u32ptr;
    00170   volatile S16 *s16ptr;
    00171   volatile U16 *u16ptr;
    00172   volatile S8  *s8ptr ;
    00173   volatile U8  *u8ptr ;
    00174 } UnionVPtr;
    00175
    00177 typedef union
    00178 {
    00179   const S64 *s64ptr;
    00180   const U64 *u64ptr;
    00181   const S32 *s32ptr;
    00182   const U32 *u32ptr;
    00183   const S16 *s16ptr;
    00184   const U16 *u16ptr;
    00185   const S8  *s8ptr ;
    00186   const U8  *u8ptr ;
    00187 } UnionCPtr;
    00188
    00190 typedef union
    00191 {
    00192   const volatile S64 *s64ptr;
    00193   const volatile U64 *u64ptr;
    00194   const volatile S32 *s32ptr;
    00195   const volatile U32 *u32ptr;
    00196   const volatile S16 *s16ptr;
    00197   const volatile U16 *u16ptr;
    00198   const volatile S8  *s8ptr ;
    00199   const volatile U8  *u8ptr ;
    00200 } UnionCVPtr;
    00201
    00203 typedef struct
    00204 {
    00205   S64 *s64ptr;
    00206   U64 *u64ptr;
    00207   S32 *s32ptr;
    00208   U32 *u32ptr;
    00209   S16 *s16ptr;
    00210   U16 *u16ptr;
    00211   S8  *s8ptr ;
    00212   U8  *u8ptr ;
    00213 } StructPtr;
    00214
    00216 typedef struct
    00217 {
    00218   volatile S64 *s64ptr;
    00219   volatile U64 *u64ptr;
    00220   volatile S32 *s32ptr;
    00221   volatile U32 *u32ptr;
    00222   volatile S16 *s16ptr;
    00223   volatile U16 *u16ptr;
    00224   volatile S8  *s8ptr ;
    00225   volatile U8  *u8ptr ;
    00226 } StructVPtr;
    00227
    00229 typedef struct
    00230 {
    00231   const S64 *s64ptr;
    00232   const U64 *u64ptr;
    00233   const S32 *s32ptr;
    00234   const U32 *u32ptr;
    00235   const S16 *s16ptr;
    00236   const U16 *u16ptr;
    00237   const S8  *s8ptr ;
    00238   const U8  *u8ptr ;
    00239 } StructCPtr;
    00240
    00242 typedef struct
    00243 {
    00244   const volatile S64 *s64ptr;
    00245   const volatile U64 *u64ptr;
    00246   const volatile S32 *s32ptr;
    00247   const volatile U32 *u32ptr;
    00248   const volatile S16 *s16ptr;
    00249   const volatile U16 *u16ptr;
    00250   const volatile S8  *s8ptr ;
    00251   const volatile U8  *u8ptr ;
    00252 } StructCVPtr;
    00253
    00255
    00256 #endif  // __AVR32_ABI_COMPILER__
    00257
    00258
    00259 //_____ M A C R O S ________________________________________________________
    00260
    00263
    00264 #define DISABLE   0
    00265 #define ENABLE    1
    00266 #define DISABLED  0
    00267 #define ENABLED   1
    00268 #define OFF       0
    00269 #define ON        1
    00270 #define FALSE     0
    00271 #define TRUE      1
    00272 #ifndef __cplusplus
    00273 #if !defined(__bool_true_false_are_defined)
    00274 #define false     FALSE
    00275 #define true      TRUE
    00276 #endif
    00277 #endif
    00278 #define KO        0
    00279 #define OK        1
    00280 #define PASS      0
    00281 #define FAIL      1
    00282 #define LOW       0
    00283 #define HIGH      1
    00284 #define CLR       0
    00285 #define SET       1
    00287
    00288
    00289 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
    00290
    00293
    00294
    00302 #define Rd_bits( value, mask)        ((value) & (mask))
    00303
    00312 #define Wr_bits(lvalue, mask, bits)  ((lvalue) = ((lvalue) & ~(mask)) |\
    00313                                                  ((bits  ) &  (mask)))
    00314
    00322 #define Tst_bits( value, mask)  (Rd_bits(value, mask) != 0)
    00323
    00331 #define Clr_bits(lvalue, mask)  ((lvalue) &= ~(mask))
    00332
    00340 #define Set_bits(lvalue, mask)  ((lvalue) |=  (mask))
    00341
    00349 #define Tgl_bits(lvalue, mask)  ((lvalue) ^=  (mask))
    00350
    00358 #define Rd_bitfield( value, mask)           (Rd_bits( value, mask) >> ctz(mask))
    00359
    00368 #define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))
    00369
    00371
    00372
    00380 #ifdef _ASSERT_ENABLE_
    00381   #define Assert(expr) \
    00382   {\
    00383     if (!(expr)) while (TRUE);\
    00384   }
    00385 #else
    00386   #define Assert(expr)
    00387 #endif
    00388
    00389
    00402
    00403
    00410 #if (defined __GNUC__)
    00411   #define clz(u)              __builtin_clz(u)
    00412 #elif (defined __ICCAVR32__)
    00413   #define clz(u)              __count_leading_zeros(u)
    00414 #endif
    00415
    00422 #if (defined __GNUC__)
    00423   #define ctz(u)              __builtin_ctz(u)
    00424 #elif (defined __ICCAVR32__)
    00425   #define ctz(u)              __count_trailing_zeros(u)
    00426 #endif
    00427
    00429
    00430
    00433
    00434
    00441 #define bit_reverse8(u8)    ((U8)(bit_reverse32((U8)(u8)) >> 24))
    00442
    00449 #define bit_reverse16(u16)  ((U16)(bit_reverse32((U16)(u16)) >> 16))
    00450
    00457 #if (defined __GNUC__)
    00458   #define bit_reverse32(u32) \
    00459   (\
    00460     {\
    00461       unsigned int __value = (U32)(u32);\
    00462       __asm__ ("brev\t%0" : "+r" (__value) :  : "cc");\
    00463       (U32)__value;\
    00464     }\
    00465   )
    00466 #elif (defined __ICCAVR32__)
    00467   #define bit_reverse32(u32)  ((U32)__bit_reverse((U32)(u32)))
    00468 #endif
    00469
    00476 #define bit_reverse64(u64)  ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\
    00477                                    ((U64)bit_reverse32((U64)(u64)) << 32)))
    00478
    00480
    00481
    00484
    00485
    00493 #define Test_align(val, n     ) (!Tst_bits( val, (n) - 1     )   )
    00494
    00502 #define Get_align( val, n     ) (  Rd_bits( val, (n) - 1     )   )
    00503
    00512 #define Set_align(lval, n, alg) (  Wr_bits(lval, (n) - 1, alg)   )
    00513
    00521 #define Align_up(  val, n     ) (((val) + ((n) - 1)) & ~((n) - 1))
    00522
    00530 #define Align_down(val, n     ) ( (val)              & ~((n) - 1))
    00531
    00533
    00534
    00546
    00547
    00556 #define Abs(a)              (((a) <  0 ) ? -(a) : (a))
    00557
    00567 #define Min(a, b)           (((a) < (b)) ?  (a) : (b))
    00568
    00578 #define Max(a, b)           (((a) > (b)) ?  (a) : (b))
    00579
    00588 #if (defined __GNUC__)
    00589   #define abs(a) \
    00590   (\
    00591     {\
    00592       int __value = (a);\
    00593       __asm__ ("abs\t%0" : "+r" (__value) :  : "cc");\
    00594       __value;\
    00595     }\
    00596   )
    00597 #elif (defined __ICCAVR32__)
    00598   #define abs(a)      Abs(a)
    00599 #endif
    00600
    00610 #if (defined __GNUC__)
    00611   #define min(a, b) \
    00612   (\
    00613     {\
    00614       int __value, __arg_a = (a), __arg_b = (b);\
    00615       __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
    00616       __value;\
    00617     }\
    00618   )
    00619 #elif (defined __ICCAVR32__)
    00620   #define min(a, b)   __min(a, b)
    00621 #endif
    00622
    00632 #if (defined __GNUC__)
    00633   #define max(a, b) \
    00634   (\
    00635     {\
    00636       int __value, __arg_a = (a), __arg_b = (b);\
    00637       __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
    00638       __value;\
    00639     }\
    00640   )
    00641 #elif (defined __ICCAVR32__)
    00642   #define max(a, b)   __max(a, b)
    00643 #endif
    00644
    00646
    00647
    00659 #define Long_call(addr)                   ((*(void (*)(void))(addr))())
    00660
    00665 #if (defined __GNUC__)
    00666   #define Reset_CPU() \
    00667   (\
    00668     {\
    00669       __asm__ __volatile__ (\
    00670         "lddpc   r9, 3f\n\t"\
    00671         "mfsr    r8, %[SR]\n\t"\
    00672         "bfextu  r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\
    00673         "cp.w    r8, 0b001\n\t"\
    00674         "breq    0f\n\t"\
    00675         "sub     r8, pc, $ - 1f\n\t"\
    00676         "pushm   r8-r9\n\t"\
    00677         "rete\n"\
    00678         "0:\n\t"\
    00679         "mtsr    %[SR], r9\n"\
    00680         "1:\n\t"\
    00681         "mov     r0, 0\n\t"\
    00682         "mov     r1, 0\n\t"\
    00683         "mov     r2, 0\n\t"\
    00684         "mov     r3, 0\n\t"\
    00685         "mov     r4, 0\n\t"\
    00686         "mov     r5, 0\n\t"\
    00687         "mov     r6, 0\n\t"\
    00688         "mov     r7, 0\n\t"\
    00689         "mov     r8, 0\n\t"\
    00690         "mov     r9, 0\n\t"\
    00691         "mov     r10, 0\n\t"\
    00692         "mov     r11, 0\n\t"\
    00693         "mov     r12, 0\n\t"\
    00694         "mov     sp, 0\n\t"\
    00695         "stdsp   sp[0], sp\n\t"\
    00696         "ldmts   sp, sp\n\t"\
    00697         "mov     lr, 0\n\t"\
    00698         "lddpc   pc, 2f\n\t"\
    00699         ".balign 4\n"\
    00700         "2:\n\t"\
    00701         ".word   _start\n"\
    00702         "3:\n\t"\
    00703         ".word   %[RESET_SR]"\
    00704         :\
    00705         : [SR] "i" (AVR32_SR),\
    00706           [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\
    00707           [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\
    00708           [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\
    00709       );\
    00710     }\
    00711   )
    00712 #elif (defined __ICCAVR32__)
    00713   #define Reset_CPU() \
    00714   {\
    00715     extern void *volatile __program_start;\
    00716     __asm__ __volatile__ (\
    00717       "mov     r7, LWRD(__program_start)\n\t"\
    00718       "orh     r7, HWRD(__program_start)\n\t"\
    00719       "mov     r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
    00720       "orh     r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
    00721       "mfsr    r8, "ASTRINGZ(AVR32_SR)"\n\t"\
    00722       "bfextu  r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\
    00723       "cp.w    r8, 001b\n\t"\
    00724       "breq    $ + 10\n\t"\
    00725       "sub     r8, pc, -12\n\t"\
    00726       "pushm   r8-r9\n\t"\
    00727       "rete\n\t"\
    00728       "mtsr    "ASTRINGZ(AVR32_SR)", r9\n\t"\
    00729       "mov     r0, 0\n\t"\
    00730       "mov     r1, 0\n\t"\
    00731       "mov     r2, 0\n\t"\
    00732       "mov     r3, 0\n\t"\
    00733       "mov     r4, 0\n\t"\
    00734       "mov     r5, 0\n\t"\
    00735       "mov     r6, 0\n\t"\
    00736       "st.w    r0[4], r7\n\t"\
    00737       "mov     r7, 0\n\t"\
    00738       "mov     r8, 0\n\t"\
    00739       "mov     r9, 0\n\t"\
    00740       "mov     r10, 0\n\t"\
    00741       "mov     r11, 0\n\t"\
    00742       "mov     r12, 0\n\t"\
    00743       "mov     sp, 0\n\t"\
    00744       "stdsp   sp[0], sp\n\t"\
    00745       "ldmts   sp, sp\n\t"\
    00746       "mov     lr, 0\n\t"\
    00747       "ld.w    pc, lr[4]"\
    00748     );\
    00749     __program_start;\
    00750   }
    00751 #endif
    00752
    00753
    00756
    00757
    00764 #if (defined __GNUC__)
    00765   #define Get_system_register(sysreg)         __builtin_mfsr(sysreg)
    00766 #elif (defined __ICCAVR32__)
    00767   #define Get_system_register(sysreg)         __get_system_register(sysreg)
    00768 #endif
    00769
    00775 #if (defined __GNUC__)
    00776   #define Set_system_register(sysreg, value)  __builtin_mtsr(sysreg, value)
    00777 #elif (defined __ICCAVR32__)
    00778   #define Set_system_register(sysreg, value)  __set_system_register(sysreg, value)
    00779 #endif
    00780
    00782
    00783
    00786
    00787
    00792 #define Is_global_exception_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
    00793
    00796 #if (defined __GNUC__)
    00797   #define Disable_global_exception()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
    00798 #elif (defined __ICCAVR32__)
    00799   #define Disable_global_exception()          (__set_status_flag(AVR32_SR_EM_OFFSET))
    00800 #endif
    00801
    00804 #if (defined __GNUC__)
    00805   #define Enable_global_exception()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
    00806 #elif (defined __ICCAVR32__)
    00807   #define Enable_global_exception()           (__clear_status_flag(AVR32_SR_EM_OFFSET))
    00808 #endif
    00809
    00814 #define Is_global_interrupt_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
    00815
    00818 #if (defined __GNUC__)
    00819   #define Disable_global_interrupt()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
    00820 #elif (defined __ICCAVR32__)
    00821   #define Disable_global_interrupt()          (__disable_interrupt())
    00822 #endif
    00823
    00826 #if (defined __GNUC__)
    00827   #define Enable_global_interrupt()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
    00828 #elif (defined __ICCAVR32__)
    00829   #define Enable_global_interrupt()           (__enable_interrupt())
    00830 #endif
    00831
    00838 #define Is_interrupt_level_enabled(int_level) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_level, M_MASK)))
    00839
    00844 #if (defined __GNUC__)
    00845   #define Disable_interrupt_level(int_level)  ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
    00846 #elif (defined __ICCAVR32__)
    00847   #define Disable_interrupt_level(int_level)  (__set_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
    00848 #endif
    00849
    00854 #if (defined __GNUC__)
    00855   #define Enable_interrupt_level(int_level)   ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
    00856 #elif (defined __ICCAVR32__)
    00857   #define Enable_interrupt_level(int_level)   (__clear_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
    00858 #endif
    00859
    00862 #define AVR32_ENTER_CRITICAL_REGION( ) \
    00863   { \
    00864   Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
    00865   Disable_global_interrupt(); // Disable the appropriate interrupts.
    00866
    00870 #define AVR32_LEAVE_CRITICAL_REGION( ) \
    00871   if (global_interrupt_enabled) Enable_global_interrupt(); \
    00872   }
    00873
    00875
    00876
    00879
    00880
    00887 #if (defined __GNUC__)
    00888   #define Get_debug_register(dbgreg)          __builtin_mfdr(dbgreg)
    00889 #elif (defined __ICCAVR32__)
    00890   #define Get_debug_register(dbgreg)          __get_debug_register(dbgreg)
    00891 #endif
    00892
    00898 #if (defined __GNUC__)
    00899   #define Set_debug_register(dbgreg, value)   __builtin_mtdr(dbgreg, value)
    00900 #elif (defined __ICCAVR32__)
    00901   #define Set_debug_register(dbgreg, value)   __set_debug_register(dbgreg, value)
    00902 #endif
    00903
    00905
    00906 #endif  // __AVR32_ABI_COMPILER__
    00907
    00908
    00910 #if ((defined __GNUC__) && (defined __AVR32__)) || ((defined __ICCAVR32__) || (defined __AAVR32__))
    00911   #define LITTLE_ENDIAN_MCU     FALSE
    00912 #else
    00913   #error If you are here, you should check what is exactly the processor you are using...
    00914   #define LITTLE_ENDIAN_MCU     FALSE
    00915 #endif
    00916
    00917 // Check that MCU endianism is correctly defined.
    00918 #ifndef LITTLE_ENDIAN_MCU
    00919   #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE
    00920 #endif
    00921
    00923 #define BIG_ENDIAN_MCU        (!LITTLE_ENDIAN_MCU)
    00924
    00925
    00926 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
    00927
    00930
    00931
    00932 #if (LITTLE_ENDIAN_MCU==TRUE)
    00933   #define LSB(u16)        (((U8  *)&(u16))[0])
    00934   #define MSB(u16)        (((U8  *)&(u16))[1])
    00935
    00936   #define LSH(u32)        (((U16 *)&(u32))[0])
    00937   #define MSH(u32)        (((U16 *)&(u32))[1])
    00938   #define LSB0W(u32)      (((U8  *)&(u32))[0])
    00939   #define LSB1W(u32)      (((U8  *)&(u32))[1])
    00940   #define LSB2W(u32)      (((U8  *)&(u32))[2])
    00941   #define LSB3W(u32)      (((U8  *)&(u32))[3])
    00942   #define MSB3W(u32)      LSB0W(u32)
    00943   #define MSB2W(u32)      LSB1W(u32)
    00944   #define MSB1W(u32)      LSB2W(u32)
    00945   #define MSB0W(u32)      LSB3W(u32)
    00946
    00947   #define LSW(u64)        (((U32 *)&(u64))[0])
    00948   #define MSW(u64)        (((U32 *)&(u64))[1])
    00949   #define LSH0(u64)       (((U16 *)&(u64))[0])
    00950   #define LSH1(u64)       (((U16 *)&(u64))[1])
    00951   #define LSH2(u64)       (((U16 *)&(u64))[2])
    00952   #define LSH3(u64)       (((U16 *)&(u64))[3])
    00953   #define MSH3(u64)       LSH0(u64)
    00954   #define MSH2(u64)       LSH1(u64)
    00955   #define MSH1(u64)       LSH2(u64)
    00956   #define MSH0(u64)       LSH3(u64)
    00957   #define LSB0D(u64)      (((U8  *)&(u64))[0])
    00958   #define LSB1D(u64)      (((U8  *)&(u64))[1])
    00959   #define LSB2D(u64)      (((U8  *)&(u64))[2])
    00960   #define LSB3D(u64)      (((U8  *)&(u64))[3])
    00961   #define LSB4D(u64)      (((U8  *)&(u64))[4])
    00962   #define LSB5D(u64)      (((U8  *)&(u64))[5])
    00963   #define LSB6D(u64)      (((U8  *)&(u64))[6])
    00964   #define LSB7D(u64)      (((U8  *)&(u64))[7])
    00965   #define MSB7D(u64)      LSB0D(u64)
    00966   #define MSB6D(u64)      LSB1D(u64)
    00967   #define MSB5D(u64)      LSB2D(u64)
    00968   #define MSB4D(u64)      LSB3D(u64)
    00969   #define MSB3D(u64)      LSB4D(u64)
    00970   #define MSB2D(u64)      LSB5D(u64)
    00971   #define MSB1D(u64)      LSB6D(u64)
    00972   #define MSB0D(u64)      LSB7D(u64)
    00973
    00974 #elif (BIG_ENDIAN_MCU==TRUE)
    00975   #define MSB(u16)        (((U8  *)&(u16))[0])
    00976   #define LSB(u16)        (((U8  *)&(u16))[1])
    00977
    00978   #define MSH(u32)        (((U16 *)&(u32))[0])
    00979   #define LSH(u32)        (((U16 *)&(u32))[1])
    00980   #define MSB0W(u32)      (((U8  *)&(u32))[0])
    00981   #define MSB1W(u32)      (((U8  *)&(u32))[1])
    00982   #define MSB2W(u32)      (((U8  *)&(u32))[2])
    00983   #define MSB3W(u32)      (((U8  *)&(u32))[3])
    00984   #define LSB3W(u32)      MSB0W(u32)
    00985   #define LSB2W(u32)      MSB1W(u32)
    00986   #define LSB1W(u32)      MSB2W(u32)
    00987   #define LSB0W(u32)      MSB3W(u32)
    00988
    00989   #define MSW(u64)        (((U32 *)&(u64))[0])
    00990   #define LSW(u64)        (((U32 *)&(u64))[1])
    00991   #define MSH0(u64)       (((U16 *)&(u64))[0])
    00992   #define MSH1(u64)       (((U16 *)&(u64))[1])
    00993   #define MSH2(u64)       (((U16 *)&(u64))[2])
    00994   #define MSH3(u64)       (((U16 *)&(u64))[3])
    00995   #define LSH3(u64)       MSH0(u64)
    00996   #define LSH2(u64)       MSH1(u64)
    00997   #define LSH1(u64)       MSH2(u64)
    00998   #define LSH0(u64)       MSH3(u64)
    00999   #define MSB0D(u64)      (((U8  *)&(u64))[0])
    01000   #define MSB1D(u64)      (((U8  *)&(u64))[1])
    01001   #define MSB2D(u64)      (((U8  *)&(u64))[2])
    01002   #define MSB3D(u64)      (((U8  *)&(u64))[3])
    01003   #define MSB4D(u64)      (((U8  *)&(u64))[4])
    01004   #define MSB5D(u64)      (((U8  *)&(u64))[5])
    01005   #define MSB6D(u64)      (((U8  *)&(u64))[6])
    01006   #define MSB7D(u64)      (((U8  *)&(u64))[7])
    01007   #define LSB7D(u64)      MSB0D(u64)
    01008   #define LSB6D(u64)      MSB1D(u64)
    01009   #define LSB5D(u64)      MSB2D(u64)
    01010   #define LSB4D(u64)      MSB3D(u64)
    01011   #define LSB3D(u64)      MSB4D(u64)
    01012   #define LSB2D(u64)      MSB5D(u64)
    01013   #define LSB1D(u64)      MSB6D(u64)
    01014   #define LSB0D(u64)      MSB7D(u64)
    01015
    01016 #else
    01017   #error  Unknown endianism.
    01018 #endif
    01019
    01021
    01022
    01033
    01034
    01043 #define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\
    01044                            ((U16)(u16) << 8)))
    01045
    01054 #define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\
    01055                            ((U32)Swap16((U32)(u32)) << 16)))
    01056
    01065 #define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\
    01066                            ((U64)Swap32((U64)(u64)) << 32)))
    01067
    01076 #if (defined __GNUC__)
    01077   #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16)))
    01078 #elif (defined __ICCAVR32__)
    01079   #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16)))
    01080 #endif
    01081
    01090 #if (defined __GNUC__)
    01091   #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32)))
    01092 #elif (defined __ICCAVR32__)
    01093   #define swap32(u32) ((U32)__swap_bytes((U32)(u32)))
    01094 #endif
    01095
    01104 #define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\
    01105                            ((U64)swap32((U64)(u64)) << 32)))
    01106
    01108
    01109
    01112
    01113
    01114 #define _GLOBEXT_           extern
    01115 #define _CONST_TYPE_        const
    01116 #define _MEM_TYPE_SLOW_
    01117 #define _MEM_TYPE_MEDFAST_
    01118 #define _MEM_TYPE_FAST_
    01119
    01120 typedef U8                  Byte;
    01121
    01122 #define memcmp_ram2ram      memcmp
    01123 #define memcmp_code2ram     memcmp
    01124 #define memcpy_ram2ram      memcpy
    01125 #define memcpy_code2ram     memcpy
    01126
    01127 #define LSB0(u32)           LSB0W(u32)
    01128 #define LSB1(u32)           LSB1W(u32)
    01129 #define LSB2(u32)           LSB2W(u32)
    01130 #define LSB3(u32)           LSB3W(u32)
    01131 #define MSB3(u32)           MSB3W(u32)
    01132 #define MSB2(u32)           MSB2W(u32)
    01133 #define MSB1(u32)           MSB1W(u32)
    01134 #define MSB0(u32)           MSB0W(u32)
    01135
    01137
    01138 #endif  // __AVR32_ABI_COMPILER__
    01139
    01140
    01141 #endif  // _COMPILER_H_