timer.c

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00001 /* ************************************************************************
00002 
00003 Copyright (c) 2006, Atmel Corporation All rights reserved. 
00004 
00005 Redistribution and use in source and binary forms, with or without
00006 modification, are permitted provided that the following conditions are met:
00007 
00008 1. Redistributions of source code must retain the above copyright notice,
00009 this list of conditions and the 
00010 following disclaimer. 
00011 
00012 2. Redistributions in binary form must reproduce the above copyright notice,
00013 this list of conditions and the following disclaimer in the documentation
00014 and/or other materials provided with the distribution.
00015 
00016 3. The name of ATMEL may not be used to endorse or promote products 
00017 derived from this software without specific prior written permission.  
00018 
00019 THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS 
00020 OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
00021 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 
00022 PARTICULAR PURPOSE ARE EXPRESSLY AND SPECIFICALLY 
00023 DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00024 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
00025 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
00026 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 
00027 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
00028 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
00029 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY 
00030 WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
00031 
00032 POSSIBILITY OF SUCH DAMAGE. 
00033 
00034 ************************************************************************ */
00035 
00036 #include "timer.h"
00037 
00038 
00039 
00040 int timer_init_capture( unsigned int instance, volatile struct timer_capture_opt_t *opt )
00041 {
00042         volatile struct avr32_timer_t *timer =timer_getHandle(instance);
00043 
00044         if( (opt->channel >= TIMER_NUMBER_OF_CHANNELS) )
00045                 return TIMER_INVALID_ARGUMENT;
00046 
00047         /* MEASURE SIGNALS: Capture operating mode */
00048         timer->channel[opt->channel].cmr =
00049                 (opt->tcclks << AVR32_TIMER_TCCLKS_OFFSET) |
00050                 (opt->clki << AVR32_TIMER_CLKI_OFFSET ) |
00051                 (opt->burst << AVR32_TIMER_BURST_OFFSET ) |
00052                 (opt->ldbstop << AVR32_TIMER_LDBSTOP_OFFSET ) |
00053                 (opt->ldbdis << AVR32_TIMER_LDBDIS_OFFSET ) |
00054                 (opt->etrgedg << AVR32_TIMER_ETRGEDG_OFFSET )|
00055                 (opt->abetrg << AVR32_TIMER_ABETRG_OFFSET ) |
00056                 (opt->cpctrg << AVR32_TIMER_CPCTRG_OFFSET )|
00057                 (TIMER_CAPTURE_OPERATING_MODE << AVR32_TIMER_WAVE_OFFSET ) |
00058                 (opt->ldra << AVR32_TIMER_LDRA_OFFSET ) |
00059                 (opt->ldrb << AVR32_TIMER_LDRB_OFFSET );
00060 
00061         return TIMER_SUCCESS;
00062 } /* end timer_init_capture() */
00063 
00064 
00065 int timer_init_waveform( unsigned int instance, volatile struct timer_waveform_opt_t *opt )
00066 {
00067         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00068 
00069         if( (opt->channel >=TIMER_NUMBER_OF_CHANNELS) | (opt->channel < TIMER_SUCCESS) )
00070                 return TIMER_INVALID_ARGUMENT;
00071 
00072         /* GENERATE SIGNALS: Waveform operating mode */
00073         timer->channel[opt->channel].cmr =
00074                 (opt->tcclks << AVR32_TIMER_TCCLKS_OFFSET) |
00075                 (opt->clki << AVR32_TIMER_CLKI_OFFSET ) |
00076                 (opt->burst << AVR32_TIMER_BURST_OFFSET ) |
00077                 (opt->cpcstop << AVR32_TIMER_CPCSTOP_OFFSET ) |
00078                 (opt->cpcdis << AVR32_TIMER_CPCDIS_OFFSET ) |
00079                 (opt->eevtedg << AVR32_TIMER_EEVTEDG_OFFSET )|
00080                 (opt->eevt << AVR32_TIMER_EEVT_OFFSET )|
00081                 (opt->enetrg << AVR32_TIMER_ENETRG_OFFSET )|
00082                 (opt->wavsel << AVR32_TIMER_WAVSEL )|
00083                 (TIMER_WAVEFORM_OPERATING_MODE << AVR32_TIMER_WAVE_OFFSET )|
00084                 (opt->acpa << AVR32_TIMER_ACPA_OFFSET )|
00085                 (opt->acpc << AVR32_TIMER_ACPC_OFFSET )|
00086                 (opt->aeevt << AVR32_TIMER_AEEVT_OFFSET )|
00087                 (opt->aswtrg << AVR32_TIMER_ASWTRG_OFFSET )|
00088                 (opt->bcpb << AVR32_TIMER_BCPB_OFFSET )|
00089                 (opt->bcpc << AVR32_TIMER_BCPC_OFFSET )|
00090                 (opt->beevt << AVR32_TIMER_BEEVT_OFFSET )|
00091                 (opt->bswtrg << AVR32_TIMER_BSWTRG_OFFSET );
00092 
00093         return TIMER_SUCCESS;
00094 } /* end timer_init_waveform() */
00095 
00096 
00097 int timer_start( unsigned int instance, unsigned int channel )
00098 {
00099         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00100 
00101         if( (channel >= AVR32_TIMER_COUNT) | (channel < 0) )
00102                 return TIMER_INVALID_ARGUMENT;
00103 
00104         /* Disable the current timer */
00105         timer->channel[channel].ccr = (1<<AVR32_TIMER_CLKEN_OFFSET) | (1<<AVR32_TIMER_SWTRG_OFFSET);
00106         return TIMER_SUCCESS;
00107 }
00108 
00109 
00110 int timer_stop( unsigned int instance, unsigned int channel )
00111 {
00112         volatile struct avr32_timer_t *timer =timer_getHandle(instance);
00113 
00114         if( (channel >= AVR32_TIMER_COUNT) | (channel < 0) )
00115                 return TIMER_INVALID_ARGUMENT;
00116 
00117         /* Disable the current timer */
00118         timer->channel[channel].ccr = (1<<AVR32_TIMER_CLKDIS_OFFSET);
00119 
00120         return TIMER_SUCCESS;
00121 }
00122 
00123 
00124 int timer_software_trigger( unsigned int instance, unsigned int channel)
00125 {
00126         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00127 
00128         if( (channel >= AVR32_TIMER_COUNT) | (channel < 0) )
00129                 return TIMER_INVALID_ARGUMENT;
00130 
00131         /* Disable the current timer */
00132         timer->channel[channel].ccr = (1<<AVR32_TIMER_SWTRG_OFFSET);
00133         return TIMER_SUCCESS;
00134 }
00135 
00136 
00137 void timer_sync_trigger( unsigned int instance )
00138 {
00139         volatile struct avr32_timer_t *timer =timer_getHandle(instance);
00140 
00141         timer->bcr = (1<<AVR32_TIMER_BCR_SYNC_OFFSET);
00142 }
00143 
00144 
00145 int timer_external_clock_selection( unsigned int instance, unsigned int channel, unsigned int clock_signal )
00146 {
00147         volatile struct avr32_timer_t *timer =timer_getHandle(instance);
00148 
00149         /* Check for valid input */
00150         if( (channel >= TIMER_NUMBER_OF_CHANNELS) | (instance >= AVR32_TIMER_COUNT) | (clock_signal >= 2) )
00151                 return TIMER_INVALID_ARGUMENT;
00152 
00153         //clear bitfield and set the correct behaviour
00154         timer->bmr &= ~( (AVR32_TIMER_BMR_TC2XC2S_SIZE+1) << (2*clock_signal) );
00155         timer->bmr = channel << (2*clock_signal) ;
00156 
00157         return TIMER_SUCCESS;
00158 }
00159 
00160 
00161 int timer_read_ra( unsigned int instance, unsigned int channel )
00162 {
00163         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00164 
00165         if (channel>=AVR32_TIMER_COUNT)
00166                 return TIMER_INVALID_ARGUMENT;
00167 
00168         return (timer->channel[channel].ra);
00169 }
00170 
00171 
00172 int timer_read_rb( unsigned int instance, unsigned int channel )
00173 {
00174         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00175 
00176         if (channel>=AVR32_TIMER_COUNT)
00177                 return TIMER_INVALID_ARGUMENT;
00178 
00179         return (timer->channel[channel].rb);
00180 }
00181 
00182 
00183 int timer_read_rc( unsigned int instance, unsigned int channel )
00184 {
00185         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00186 
00187         if (channel>=AVR32_TIMER_COUNT)
00188                 return TIMER_INVALID_ARGUMENT;
00189 
00190         return (timer->channel[channel].rc);
00191 }
00192 
00193 
00194 int timer_read_tc( unsigned int instance, unsigned int channel )
00195 {
00196         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00197 
00198         if (channel>=AVR32_TIMER_COUNT)
00199                 return TIMER_INVALID_ARGUMENT;
00200 
00201         return (timer->channel[channel].cv);
00202 }
00203 
00204 
00205 int timer_write_ra( unsigned int instance, unsigned int channel, unsigned short value )
00206 {
00207         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00208 
00209         if( (channel>=AVR32_TIMER_COUNT) | (channel>=TIMER_NUMBER_OF_CHANNELS) )
00210                 return TIMER_INVALID_ARGUMENT;
00211 
00212         /* This function is only available in WAVEFORM mode */
00213         if(timer->channel[channel].cmr & AVR32_TIMER_CMR0_WAVE_MASK)
00214                 timer->channel[channel].ra = value;
00215 
00216         return TIMER_SUCCESS;
00217 }
00218 
00219 
00220 int timer_write_rb( unsigned int instance, unsigned int channel, unsigned short value )
00221 {
00222         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00223 
00224         if( (channel>=AVR32_TIMER_COUNT) | ( channel >= TIMER_NUMBER_OF_CHANNELS ) )
00225                 return TIMER_INVALID_ARGUMENT;
00226 
00227         /* This function is only available in WAVEFORM mode */
00228         if(timer->channel[channel].cmr & AVR32_TIMER_CMR0_WAVE_MASK)
00229                 timer->channel[channel].rb = value;
00230 
00231         return TIMER_SUCCESS;
00232 }
00233 
00234 
00235 int timer_write_rc( unsigned int instance, unsigned int channel, unsigned short value )
00236 {
00237         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00238 
00239         if( (channel >= AVR32_TIMER_COUNT) | (channel >= TIMER_NUMBER_OF_CHANNELS) )
00240                 return TIMER_INVALID_ARGUMENT;
00241 
00242         /* This function is only available in WAVEFORM mode */
00243         if(timer->channel[channel].cmr & AVR32_TIMER_CMR0_WAVE_MASK)
00244                 timer->channel[channel].rc = value;
00245 
00246         return TIMER_SUCCESS;
00247 }
00248 
00249 
00250 unsigned long timer_read_sr( unsigned int instance, unsigned int channel )
00251 {
00252         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00253 
00254         return timer->channel[channel].sr;
00255 
00256 }
00257 
00258 
00259 volatile avr32_timer_t * timer_getHandle( unsigned int instance )
00260 {
00261   switch (instance) {
00262 
00263   case 0:
00264     return &AVR32_TIMER0;
00265 
00266   case 1:
00267     return &AVR32_TIMER1;
00268 
00269   default:
00270     break;
00271     
00272   }
00273   return (avr32_timer_t *) TIMER_INVALID_ARGUMENT;
00274 
00275 }
00276 
00277 
00278 int timer_configure_interrupts(unsigned int instance, unsigned int channel, volatile struct timer_interrupt_t *bitfield)
00279 {
00280         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00281 
00282         if( instance >= AVR32_TIMER_COUNT )
00283                 return TIMER_INVALID_ARGUMENT;
00284 
00285         /* enable the appropriate interrupts */
00286         timer->channel[channel].ier = (bitfield->covfs << AVR32_TIMER_COVFS_OFFSET) |
00287                                                                 (bitfield->lovrs << AVR32_TIMER_LOVRS_OFFSET) |
00288                                                                 (bitfield->cpas << AVR32_TIMER_CPAS_OFFSET) |
00289                                                                 (bitfield->cpbs << AVR32_TIMER_CPBS_OFFSET) |
00290                                                                 (bitfield->cpcs << AVR32_TIMER_CPCS_OFFSET) |
00291                                                                 (bitfield->ldras << AVR32_TIMER_LDRAS_OFFSET) |
00292                                                                 (bitfield->ldrbs << AVR32_TIMER_LDRBS_OFFSET) |
00293                                                                 (bitfield->etrgs << AVR32_TIMER_ETRGS_OFFSET);
00294 
00295         /* disable the appropriate interrupts */
00296         timer->channel[channel].idr = ( ~(bitfield->covfs) << AVR32_TIMER_COVFS_OFFSET) |
00297                                                                 ( ~(bitfield->lovrs) << AVR32_TIMER_LOVRS_OFFSET) |
00298                                                                 ( ~(bitfield->cpas) << AVR32_TIMER_CPAS_OFFSET) |
00299                                                                 ( ~(bitfield->cpbs) << AVR32_TIMER_CPBS_OFFSET) |
00300                                                                 ( ~(bitfield->cpcs) << AVR32_TIMER_CPCS_OFFSET) |
00301                                                                 ( ~(bitfield->ldras) << AVR32_TIMER_LDRAS_OFFSET) |
00302                                                                 ( ~(bitfield->ldrbs) << AVR32_TIMER_LDRBS_OFFSET) |
00303                                                                 ( ~(bitfield->etrgs) << AVR32_TIMER_ETRGS_OFFSET);
00304 
00305         return TIMER_SUCCESS;
00306 }
00307 
00308 
00309 char timer_interrupt_settings(unsigned int instance, unsigned int channel)
00310 {
00311         volatile struct avr32_timer_t *timer = timer_getHandle(instance);
00312 
00313         if( (instance >= AVR32_TIMER_COUNT) | (channel >= TIMER_NUMBER_OF_CHANNELS) )
00314                 return TIMER_INVALID_ARGUMENT;
00315 
00316         return timer->channel[channel].imr;
00317 
00318 }

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