sdram_usart_test.c

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00001 #define USART 0
00002 
00003 #if USART
00004   #include "../usart/usart.h"
00005   #include <stdio.h>
00006 #endif
00007 #include "sdram.h"
00008 #include <avr32/io.h>
00009 #include "mt481c2m32b2tg.h"
00010 
00011 #define SUCCESS 0
00012 #define FAILURE -1
00013 
00014 #if USART
00015   typedef char avr32_piomap_t[][2];
00016   void init_rs232( void );
00017   int print(volatile avr32_usart_t * usart, char *str);
00018   int pio_enable_module(avr32_piomap_t piomap, int size);
00019 #endif
00020 
00021 #ifndef __GNUC__
00022   #define AVR32_USART1_RXD_0_PIN      17
00023   #define AVR32_USART1_RXD_0_FUNCTION 0
00024   #define AVR32_USART1_TXD_0_PIN      18
00025   #define AVR32_USART1_TXD_0_FUNCTION 0
00026 #endif
00027 
00028 #define STK1000_SDRAM_BASE 0xB0000000 /* Using privileged mode P2 to bypass cache*/
00029 #define CPU_HZ 20000000
00030 
00031 int main( void )
00032 {
00033   static sdram_info *info;
00034   unsigned long sdram_size, tmp, i;
00035   int noErrors=0;
00036   volatile unsigned long *sdram = (void *) STK1000_SDRAM_BASE;
00037 
00038   info->physical_address = STK1000_SDRAM_BASE;
00039   info->cols = mt481c2m32b2tg_cols;
00040   info->rows = mt481c2m32b2tg_rows;
00041   info->banks = mt481c2m32b2tg_banks;
00042   info->cas = mt481c2m32b2tg_cas;
00043   info->twr = mt481c2m32b2tg_twr;
00044   info->trc = mt481c2m32b2tg_trc;
00045   info->trp = mt481c2m32b2tg_trp;
00046   info->trcd = mt481c2m32b2tg_trcd;
00047   info->tras = mt481c2m32b2tg_tras;
00048   info->txsr = mt481c2m32b2tg_txsr;
00049 
00050   /* Calculate sdram size */
00051   sdram_size = 1 << (info->rows + info->cols + info->banks + 2);
00052 
00053 #if USART
00054   init_rs232();
00055 #endif
00056   printf("\nEXTERNAL SDRAM TEST\n\n");
00057   sdramc_init(info);
00058   mt481c2m32b2tg_init(info);
00059   printf("Initialization complete\nTest starting...\n");
00060   printf("Filling memoryspace (0x%lx)\n", sdram_size);
00061 
00062   for (i = 0; i < sdram_size; i++){
00063     sdram[i] = i;
00064     tmp = sdram[i];
00065     if (tmp != i) {
00066     #if USART
00067       printf("SDRAM verifcation failed at 0x%lx", STK1000_SDRAM_BASE + i);
00068       printf(". Read 0x%lx instead of expected 0x%lx\n", tmp, i);
00069     #endif
00070       noErrors++;
00071     }
00072   }
00073 
00074   if(noErrors==0){
00075     printf("SDRAM test completed successfully\n");
00076     return SUCCESS;
00077   }else{
00078     printf("SDRAM test completed with %x errors", noErrors);
00079     return FAILURE;
00080   }
00081 }
00082 
00083 #if USART
00084 void init_rs232( void )
00085 {
00086     struct usart_options_t opt;
00087     volatile struct avr32_usart_t *usart1 = &AVR32_USART1;
00088 
00089     avr32_piomap_t usart_piomap = {
00090       {AVR32_USART1_RXD_0_PIN, AVR32_USART1_RXD_0_FUNCTION},
00091       {AVR32_USART1_TXD_0_PIN, AVR32_USART1_TXD_0_FUNCTION}
00092     };
00093 
00094     // Set options for the USART
00095     opt.baudrate = 115200;
00096     opt.charlength = 8;
00097     opt.paritytype = USART_NO_PARITY;
00098     opt.stopbits = USART_1_STOPBIT;
00099     opt.channelmode = USART_NORMAL_CHMODE;
00100 
00101     // Initialize it in RS232 mode
00102     usart_init_rs232(usart1, &opt, CPU_HZ);
00103 
00104     pio_enable_module(usart_piomap, 2);
00105 
00106 }
00107 
00108 /* This will enable the usart functionality in the pio module */
00109 int pio_enable_module(avr32_piomap_t piomap, int size)
00110 {
00111   int i;
00112   volatile avr32_pio_t *pio;
00113 
00114   /* get the base address for the port */
00115   switch (**piomap/32) {
00116 
00117   case 0:
00118     pio = &AVR32_PIOA;
00119     break;
00120   case 1:
00121     pio = &AVR32_PIOB;
00122     break;
00123   case 2:
00124     pio = &AVR32_PIOC;
00125     break;
00126   case 3:
00127     pio = &AVR32_PIOD;
00128     break;
00129   case 4:
00130     pio = &AVR32_PIOE;
00131     break;
00132   default :
00133     return -FAILURE;
00134 
00135   }
00136 
00137   for(i=0; i<size; i++){
00138 
00139     pio->pdr |= ( 1<<( (**piomap) % 32) );
00140     pio->pudr |= ( 1<<( (**piomap) % 32) );
00141 
00142     switch( *(*piomap+1) ){    
00143     case 0: /* module A */
00144       pio->asr |= ( 1<<( (**piomap) % 32) );
00145       break;
00146     case 1: /* module B */
00147       pio->bsr |= ( 1<<( (**piomap) % 32) );
00148       break;
00149     default:
00150       return FAILURE;
00151     }
00152 
00153     piomap++;
00154 
00155   }
00156   
00157   return SUCCESS;
00158 }
00159 
00160 int print(volatile avr32_usart_t * usart, char *str)
00161 {
00162         while (*str != '\0')
00163                 usart_putchar(usart, *str++);
00164         return 0;
00165 }
00166 
00167 
00168 /* Newlib replacements for usart */
00169 
00170 int _write_r ( struct _reent *ptr, int fd, const void *buf, size_t cnt )
00171 {
00172   volatile struct avr32_usart_t *usart = &AVR32_USART1;
00173   char *msg = (char *) buf;
00174   int i;
00175 
00176   for(i=0; i<cnt; i++){
00177     usart_putchar(usart, *msg++);
00178   }
00179  return cnt;
00180 }
00181 
00182 int unimplemented_syscall(const char *);
00183 int remove (char const *dummy){ return unimplemented_syscall("remove");}
00184 int __close (){ return unimplemented_syscall("__close");}
00185 
00186 #endif
00187 

Generated on Thu May 10 13:52:44 2007 for AVR32102 - Using the AVR32 SDRAM controller by  doxygen 1.5.1