sdram_test.c

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00001 /* ************************************************************************
00002 
00003 Copyright (c) 2006, Atmel Corporation All rights reserved.
00004 
00005 Redistribution and use in source and binary forms, with or without
00006 modification, are permitted provided that the following conditions are met:
00007 
00008 1. Redistributions of source code must retain the above copyright notice,
00009 this list of conditions and the
00010 following disclaimer.
00011 
00012 2. Redistributions in binary form must reproduce the above copyright notice,
00013 this list of conditions and the following disclaimer in the documentation
00014 and/or other materials provided with the distribution.
00015 
00016 3. The name of ATMEL may not be used to endorse or promote products
00017 derived from this software without specific prior written permission.
00018 
00019 THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS
00020 OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00021 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
00022 PARTICULAR PURPOSE ARE EXPRESSLY AND SPECIFICALLY
00023 DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00024 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00025 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00026 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00027 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
00028 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
00030 WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00031 
00032 POSSIBILITY OF SUCH DAMAGE.
00033 
00034 ************************************************************************ */
00035 
00036 #include "sdram.h"
00037 #include "mt481c2m32b2tg.h"
00038 
00039 #define STK1000_SDRAM_BASE 0xB0000000 /* Using privileged mode P2 to bypass cache*/
00040 
00045 int main( void )
00046 {
00047   static sdram_info *info;
00048   unsigned long sdram_size, tmp, i;
00049   int noErrors=0;
00050   volatile unsigned long *sdram = (void *) STK1000_SDRAM_BASE;
00051 
00052   info->physical_address = STK1000_SDRAM_BASE;
00053   info->cols = mt481c2m32b2tg_cols;
00054   info->rows = mt481c2m32b2tg_rows;
00055   info->banks = mt481c2m32b2tg_banks;
00056   info->cas = mt481c2m32b2tg_cas;
00057   info->twr = mt481c2m32b2tg_twr;
00058   info->trc = mt481c2m32b2tg_trc;
00059   info->trp = mt481c2m32b2tg_trp;
00060   info->trcd = mt481c2m32b2tg_trcd;
00061   info->tras = mt481c2m32b2tg_tras;
00062   info->txsr = mt481c2m32b2tg_txsr;
00063 
00064   /* Calculate sdram size */
00065   sdram_size = 1 << (info->rows + info->cols + info->banks + 2);
00066 
00067   /* initialize the avr32 sdram controller */
00068   sdramc_init(info);
00069 
00070   /* initialize the external sdram chip */
00071   mt481c2m32b2tg_init(info);
00072 
00073   /* test the chip */
00074   for (i = 0; i < sdram_size; i++){
00075     sdram[i] = i;
00076     tmp = sdram[i];
00077     if (tmp != i) {
00078       noErrors++;
00079     }
00080   }
00081 
00082   return noErrors;
00083 }
00084 

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