00001 #ifndef _AVR32_PM_H_ 00002 #define _AVR32_PM_H_ 00003 00004 #include <avr32/io.h> 00005 00006 #define PM_TIMEOUT 500000 00007 00008 #define PM_OSC0_HZ 20000000 00009 #define PM_OSC1_HZ 12000000 00010 00011 #define PM_OSC0 0 00012 #define PM_OSC1 1 00013 00014 #define PM_PLL0 2 00015 #define PM_PLL1 3 00016 00017 #define PM_SUCCESS 0 00018 #define PM_INVALID_ARGUMENT -1 00019 #define PM_LOCK_ERROR -2 00020 00021 #define PM_APBB_CLOCK 10 00022 #define PM_APBA_CLOCK 11 00023 #define PM_AHB_CLOCK 12 00024 #define PM_CPU_CLOCK 13 00025 00026 #define PM_INT_SOURCES 7 00027 00028 00029 #ifdef __GNUC__ 00030 #ifdef __AVR32_AP7000__ 00031 #define PM_EXT_OSC0 20000000 00032 #define PM_EXT_OSC1 12000000 00033 #endif 00034 #endif 00035 00036 /* CPUMASK */ 00037 #define PM_CPU_DOMAIN 0 00038 #define PM_CPU_DOMAIN_SIZE 1 00039 #define PM_CPU_PICO 0 00040 00041 /*AHB*/ 00042 #define PM_AHB_DOMAIN 1 00043 #define PM_AHB_DOMAIN_SIZE 11 00044 #define PM_AHB_HEBI 32 00045 #define PM_AHB_APBA 33 00046 #define PM_AHB_APBB 34 00047 #define PM_AHB_HRAMC 35 00048 #define PM_AHB_AHBBRIDGE 36 00049 #define PM_AHB_HISI 37 00050 #define PM_AHB_USB 38 00051 #define PM_AHB_LCDC 39 00052 #define PM_AHB_MACB0 40 00053 #define PM_AHB_MACB1 41 00054 #define PM_AHB_DMAC 42 00055 00056 /*APBA*/ 00057 #define PM_APBA_DOMAIN 2 00058 #define PM_APBA_DOMAIN_SIZE 17 00059 #define PM_APBA_SPI0 64 00060 #define PM_APBA_SPI1 65 00061 #define PM_APBA_TWI 66 00062 #define PM_APBA_USART0 67 00063 #define PM_APBA_USART1 68 00064 #define PM_APBA_USART2 69 00065 #define PM_APBA_USART3 70 00066 #define PM_APBA_SSC0 71 00067 #define PM_APBA_SSC1 72 00068 #define PM_APBA_SSC2 73 00069 #define PM_APBA_PIOA 74 00070 #define PM_APBA_PIOB 75 00071 #define PM_APBA_PIOC 76 00072 #define PM_APBA_PIOD 77 00073 #define PM_APBA_PIOE 78 00074 #define PM_APBA_PIOF 80 00075 #define PM_APBA_HPDC 81 00076 00077 /* APBB */ 00078 #define PM_APBB_DOMAIN 3 00079 #define PM_APBB_DOMAIN_SIZE 15 00080 #define PM_APBB_SM 96 00081 #define PM_APBB_INTC 97 00082 #define PM_APBB_HMATRIX 98 00083 #define PM_APBB_TIMER0 99 00084 #define PM_APBB_TIMER1 100 00085 #define PM_APBB_PWM 101 00086 #define PM_APBB_MACB0 102 00087 #define PM_APBB_MACB1 103 00088 #define PM_APBB_DAC 104 00089 #define PM_APBB_MMCI 105 00090 #define PM_APBB_AUDIOC 106 00091 #define PM_APBB_HISI 107 00092 #define PM_APBB_USB 108 00093 #define PM_APBB_HSMC 109 00094 #define PM_APBB_HSDRAMC 110 00095 #define PM_APBB_HECC 111 00096 00097 struct pll_opt_t{ 00098 unsigned int pll; 00099 unsigned int multiplier; 00100 unsigned int divider; 00101 unsigned int oscillator; 00102 }; 00103 00104 struct clk_sel_opt_t{ 00105 unsigned int clock; 00106 unsigned int divider; 00107 unsigned int div_enable; 00108 }; 00109 00110 struct gen_clk_opt_t{ 00111 unsigned int div; 00112 unsigned int diven; 00113 unsigned int cen; 00114 unsigned int pllsel; 00115 unsigned int oscsel; 00116 }; 00117 00118 /* reset all clocks and set mclk to OSC0 */ 00119 int pm_reset( void ); 00120 00121 /* wait for lock bit to settle */ 00122 int pm_wait_for_lock(unsigned int lockbit); 00123 00124 00125 00126 /* Modify a specific pll */ 00127 int pm_set_pll( volatile struct pll_opt_t *opt ); 00128 00129 /* Read a specific pll */ 00130 int pm_read_pll_frequency( unsigned int pll ); 00131 00132 /*Read a specific oscillator value*/ 00133 int pm_read_osc( unsigned int osc ); 00134 00135 00136 00137 /* Set the source for the main clock */ 00138 int pm_set_mclk_source(unsigned int source); 00139 00140 /* Read the main clock src */ 00141 int pm_read_mclk_source( void ); 00142 00143 /* Read the main clock frequency*/ 00144 int pm_read_mclk( void ); 00145 00146 00147 00148 int pm_read_clock_domain_scaler(unsigned int clock_domain); 00149 00150 /* Select clocks for different domains of the system */ 00151 int pm_set_clock_domain_scaler(volatile struct clk_sel_opt_t *opt); 00152 00153 /* Return the value of the scaling register */ 00154 int pm_read_scaling_register(void); 00155 00156 /* Read the actual clock frequency a specific module is running at*/ 00157 int pm_read_module_frequency(int module); 00158 00159 /* Unmask a single module clock part of a clock domain */ 00160 int pm_unmask_module_clock( unsigned int clock); 00161 00162 /* Mask a single module clock part of a clock domain */ 00163 int pm_mask_module_clock( unsigned int clock); 00164 00165 /* Unmask all module clocks */ 00166 void pm_unmask_all_module_clocks( void ); 00167 00168 /* Mask all module clocks */ 00169 void pm_mask_all_module_clocks( void ); 00170 00171 00172 00173 /* Enable interrupt */ 00174 int pm_interrupt_enable( unsigned int source ); 00175 00176 /* Disable interrupt*/ 00177 int pm_interrupt_disable( unsigned int source ); 00178 00179 /* Status of interrupt*/ 00180 int pm_interrupt_status( unsigned int source ); 00181 00182 /* Clear interrupt */ 00183 int pm_interrupt_clear( unsigned int source ); 00184 00185 /* Clear interrupt */ 00186 int pm_interrupt_mask( unsigned int source ); 00187 00188 00189 00190 /* Modify the generic clock */ 00191 int pm_generic_clock_control( struct gen_clk_opt_t *opt); 00192 00193 00194 00195 #endif /* _AVR32_SYSTEM_MANAGER_H_ */
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