pll_drv.h

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00014 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
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00040 
00041 #ifndef PLL_DRV_H
00042 #define PLL_DRV_H
00043 
00044 //_____ I N C L U D E S ____________________________________________________
00045 
00049 //_____ M A C R O S ________________________________________________________
00050 
00054 #define PLLx06          ( (0<<PLLP2) | (1<<PLLP1) | (1<<PLLP0) )
00055 
00056 #ifdef __ICCAVR__
00057    #if (defined(__AT90USB1287__) || defined(__AT90USB1286__)) 
00058       #define PLLx03          ( (1<<PLLP2) | (0<<PLLP1) | (1<<PLLP0) )
00059    #elif (defined(__AT90USB647__) || defined(__AT90USB646__) || defined(__ATmega32U6__))
00060       #define PLLx03          ( (1<<PLLP2) | (1<<PLLP1) | (0<<PLLP0) )
00061    #else
00062       #error TARGET should be defined 
00063    #endif
00064 #elif defined __GNUC__
00065    #if (defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB1286__)) 
00066       #define PLLx03          ( (1<<PLLP2) | (0<<PLLP1) | (1<<PLLP0) )
00067    #elif (defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB646__) || defined(__AVR_ATmega32U6__))
00068       #define PLLx03          ( (1<<PLLP2) | (1<<PLLP1) | (0<<PLLP0) )
00069    #endif
00070 #else // Other compiler
00071    #error Compiler unknow
00072 #endif
00073 
00074 
00077 #define Start_pll(clockfactor)   (PLLCSR = ( clockfactor  | (1<<PLLE)  ))
00079 #define Is_pll_ready()           (PLLCSR & (1<<PLOCK) )
00081 #define Wait_pll_ready()         while (!(PLLCSR & (1<<PLOCK)))
00083 #define Stop_pll()               (PLLCSR  &= (~(1<<PLLE)),PLLCSR=0 ) 
00084 #ifdef CUSTOM_PLL_START_AUTO
00085    #define    Pll_start_auto()   CUSTOM_PLL_START_AUTO
00086 #else
00087 
00088       // Start the PLL in autofactor mode
00089       // regarding FOSC define
00090 #if   (FOSC==8000)
00091    #define Pll_start_auto()   Start_pll(PLLx06)
00092 #elif (FOSC==16000)
00093    #define Pll_start_auto()   Start_pll(PLLx03)
00094 #else
00095    #error   "FOSC should be defined with 8000KHz or 16000KHz in config.h"
00096 #endif
00097 #endif
00098 
00100 
00102 #endif  // PLL_DRV_H
00103 
00104 

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