mc_drv.h File Reference

Detailed Description

Copyright (c) 2005 Atmel.This module provide services to define config for AT90PWM3 Only Describes the system dependant software configuration. This file is included by all source files in order to access to system wide configuration.

Version:
1.0 (CVS revision :
Revision
1.3
)
Date:
Date
2006/07/12 12:58:27
Author:
Author
raubree

Definition in file mc_drv.h.

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Go to the source code of this file.

Defines

#define BUSY   1
#define Clear_EXT1()   (PORTB &= ~(1<<PB3))
#define Clear_EXT10()   (PORTD &= ~(1<<PD2))
#define Clear_EXT2()   (PORTB &= ~(1<<PB4))
#define Clear_EXT3()   (PORTC &= ~(1<<PC1))
#define Clear_EXT4()   (PORTC &= ~(1<<PC2))
#define Clear_EXT5()   (PORTB &= ~(1<<PB5))
#define Clear_EXT6()   (PORTE &= ~(1<<PE1))
#define Clear_EXT7()   (PORTD &= ~(1<<PD3))
#define Clear_EXT8()   (PORTD &= ~(1<<PD4))
#define Clear_EXT9()   (PORTE &= ~(1<<PE0))
#define Clear_Port_Q1()   (PORTB &= ( ~(1<<PORTB0)))
#define Clear_Port_Q2()   (PORTB &= ( ~(1<<PORTB1)))
#define Clear_Port_Q3()   (PORTC &= ( ~(1<<PORTC0)))
#define Clear_Port_Q4()   (PORTB &= ( ~(1<<PORTB6)))
#define Clear_Port_Q5()   (PORTD &= ( ~(1<<PORTD0)))
#define Clear_Port_Q6()   (PORTB &= ( ~(1<<PORTB7)))
#define CONV_CURRENT   2
#define CONV_INIT   0
#define CONV_POT   1
#define FILTER_DELAY   4
#define FREE   0
#define Get_EXT1()   ((PINB & (1<<PB3))>>PB3)
#define Get_EXT10()   ((PIND & (1<<PD2))>>PD2)
#define Get_EXT2()   ((PINB & (1<<PB4))>>PB4)
#define Get_EXT3()   ((PINC & (1<<PC1))>>PC1)
#define Get_EXT4()   ((PINC & (1<<PC2))>>PC2)
#define Get_EXT5()   ((PINB & (1<<PB5))>>PB5)
#define Get_EXT6()   ((PINE & (1<<PE1))>>PE1)
#define Get_EXT7()   ((PIND & (1<<PD3))>>PD3)
#define Get_EXT8()   ((PIND & (1<<PD4))>>PD4)
#define Get_EXT9()   ((PINE & (1<<PE0))>>PE0)
#define HALL_A()   (ANACOMP_0_vect)
#define HALL_B()   (ANACOMP_1_vect)
#define HALL_C()   (ANACOMP_2_vect)
#define HALL_SENSOR_VALUE()
#define MASK_DEMAG   2
#define MAX_DELAY   40
#define MIN_DELAY   2
#define OUTPUT_ACTIVE_HIGH   (1<<POP0)
#define OUTPUT_ACTIVE_LOW   (0<<POP0)
#define output_disconnected   0x01
#define PRESC_DIV_BY_16   (1<<PPRE01)|(0<<PPRE00)
#define PRESC_DIV_BY_4   (0<<PPRE01)|(1<<PPRE00)
#define PRESC_DIV_BY_64   (1<<PPRE01)|(1<<PPRE00)
#define PRESC_NODIV   (0<<PPRE01)|(0<<PPRE00)
#define PSC_CENTERED   (1<<PMODE01)|(1<<PMODE00)
#define PSC_FOUR_RAMP   (1<<PMODE01)|(0<<PMODE00)
#define PSC_ONE_RAMP   (0<<PMODE01)|(0<<PMODE00)
#define PSC_TWO_RAMP   (0<<PMODE01)|(1<<PMODE00)
#define RAMP_MODE_NUMBER   PSC_ONE_RAMP
#define RELEASE_PLOCK   (0<<PLOCK0)
#define Set_EXT1()   (PORTB |= (1<<PB3))
#define Set_EXT10()   (PORTD |= (1<<PD2))
#define Set_EXT2()   (PORTB |= (1<<PB4))
#define Set_EXT3()   (PORTC |= (1<<PC1))
#define Set_EXT4()   (PORTC |= (1<<PC2))
#define Set_EXT5()   (PORTB |= (1<<PB5))
#define Set_EXT6()   (PORTE |= (1<<PE1))
#define Set_EXT7()   (PORTD |= (1<<PD3))
#define Set_EXT8()   (PORTD |= (1<<PD4))
#define Set_EXT9()   (PORTE |= (1<<PE0))
#define Set_none()
#define SET_PLOCK   (1<<PLOCK0)
#define Set_Port_Q2()   (PORTB |= (1<<PORTB1))
#define Set_Port_Q4()   (PORTB |= (1<<PORTB6))
#define Set_Port_Q6()   (PORTB |= (1<<PORTB7))
#define Set_Q1Q4()
#define Set_Q1Q6()
#define Set_Q3Q2()
#define Set_Q3Q6()
#define Set_Q5Q2()
#define Set_Q5Q4()
#define Set_timer_data_register_to_zero()   (TCNT0=0x00)
#define switch_OFF_LED()   (PORTE |= (1<<PE2))
#define switch_ON_LED()   (PORTE &= ~(1<<PE2))
#define Toggle_EXT6()   (PINE |= (1<<PINE1))
#define Toggle_EXT9()   (PINE |= (1<<PINE0))

Functions

void mc_ADC_Scheduler (void)
 Launch the scheduler for the ADC.
void mc_config_sampling_period (void)
 Timer 1 Configuration Use to generate a 250us activation for main loop.
void mc_config_time_estimation_speed (void)
 Timer 0 Configuration The timer 0 is used to generate an IT when an overflow occurs.
void mc_duty_cycle (U8 level)
 Set the duty cycle values in the PSC according to the value calculate by the regulation loop.
void mc_estimation_speed (void)
 estimation speed
U8 mc_Get_Current (void)
U8 mc_get_hall (void)
 Get the value of hall sensors (1 to 6).
S32 mc_get_Num_Turn (void)
 Get the number of rotor rotation.
U8 mc_Get_Potentiometer (void)
void mc_init_HW (void)
 init hardware (peripherals)
void mc_init_IT (void)
 Initialization of AT90PWM3B External Interrupts.
void mc_init_port (void)
 Initialization of IO PORTS for AT90PWM3B.
void mc_init_pwm (void)
 Initialization of PWM generators (PSC) for AT90PWM3B.
void mc_init_SW (void)
 init SW
void mc_reset_Num_Turn (void)
 Reset the number of rotor rotation.
void mc_set_Over_Current (U8 Level)
 Set the Over Current threshold.
void mc_switch_commutation (U8 position)
 Set the Switching Commutation value on outputs according to sensor or estimation position.
void PSC0_Init (unsigned int OCRnRB, unsigned int OCRnSB, unsigned int OCRnRA, unsigned int OCRnSA)
 Initialization of PWM generator PSC0.
void PSC1_Init (unsigned int OCRnRB, unsigned int OCRnSB, unsigned int OCRnRA, unsigned int OCRnSA)
 Initialization of PWM generator PSC1.
void PSC2_Init (unsigned int OCRnRB, unsigned int OCRnSB, unsigned int OCRnRA, unsigned int OCRnSA)
 Initialization of PWM generator PSC2.
void PSC_Run (void)
void PSC_Stop (void)

Define Documentation

#define BUSY   1

Definition at line 160 of file mc_drv.h.

Referenced by mc_ADC_Scheduler().

 
#define Clear_EXT1 (  )     (PORTB &= ~(1<<PB3))

Definition at line 121 of file mc_drv.h.

 
#define Clear_EXT10 (  )     (PORTD &= ~(1<<PD2))

Definition at line 141 of file mc_drv.h.

 
#define Clear_EXT2 (  )     (PORTB &= ~(1<<PB4))

Definition at line 123 of file mc_drv.h.

 
#define Clear_EXT3 (  )     (PORTC &= ~(1<<PC1))

Definition at line 125 of file mc_drv.h.

Referenced by mc_regulation_loop().

 
#define Clear_EXT4 (  )     (PORTC &= ~(1<<PC2))

Definition at line 127 of file mc_drv.h.

 
#define Clear_EXT5 (  )     (PORTB &= ~(1<<PB5))

Definition at line 129 of file mc_drv.h.

 
#define Clear_EXT6 (  )     (PORTE &= ~(1<<PE1))

Definition at line 131 of file mc_drv.h.

 
#define Clear_EXT7 (  )     (PORTD &= ~(1<<PD3))

Definition at line 134 of file mc_drv.h.

 
#define Clear_EXT8 (  )     (PORTD &= ~(1<<PD4))

Definition at line 136 of file mc_drv.h.

 
#define Clear_EXT9 (  )     (PORTE &= ~(1<<PE0))

Definition at line 138 of file mc_drv.h.

 
#define Clear_Port_Q1 (  )     (PORTB &= ( ~(1<<PORTB0)))

Definition at line 63 of file mc_drv.h.

 
#define Clear_Port_Q2 (  )     (PORTB &= ( ~(1<<PORTB1)))

Definition at line 66 of file mc_drv.h.

 
#define Clear_Port_Q3 (  )     (PORTC &= ( ~(1<<PORTC0)))

Definition at line 64 of file mc_drv.h.

 
#define Clear_Port_Q4 (  )     (PORTB &= ( ~(1<<PORTB6)))

Definition at line 67 of file mc_drv.h.

 
#define Clear_Port_Q5 (  )     (PORTD &= ( ~(1<<PORTD0)))

Definition at line 65 of file mc_drv.h.

 
#define Clear_Port_Q6 (  )     (PORTB &= ( ~(1<<PORTB7)))

Definition at line 68 of file mc_drv.h.

#define CONV_CURRENT   2

Definition at line 157 of file mc_drv.h.

Referenced by ADC_EOC(), and mc_ADC_Scheduler().

#define CONV_INIT   0

Definition at line 155 of file mc_drv.h.

Referenced by mc_ADC_Scheduler().

#define CONV_POT   1

Definition at line 156 of file mc_drv.h.

Referenced by ADC_EOC(), and mc_ADC_Scheduler().

#define FILTER_DELAY   4

Definition at line 60 of file mc_drv.h.

Referenced by mc_estimation_speed().

#define FREE   0

Definition at line 159 of file mc_drv.h.

Referenced by ADC_EOC(), and mc_ADC_Scheduler().

 
#define Get_EXT1 (  )     ((PINB & (1<<PB3))>>PB3)

Definition at line 143 of file mc_drv.h.

 
#define Get_EXT10 (  )     ((PIND & (1<<PD2))>>PD2)

Definition at line 152 of file mc_drv.h.

 
#define Get_EXT2 (  )     ((PINB & (1<<PB4))>>PB4)

Definition at line 144 of file mc_drv.h.

 
#define Get_EXT3 (  )     ((PINC & (1<<PC1))>>PC1)

Definition at line 145 of file mc_drv.h.

 
#define Get_EXT4 (  )     ((PINC & (1<<PC2))>>PC2)

Definition at line 146 of file mc_drv.h.

 
#define Get_EXT5 (  )     ((PINB & (1<<PB5))>>PB5)

Definition at line 147 of file mc_drv.h.

 
#define Get_EXT6 (  )     ((PINE & (1<<PE1))>>PE1)

Definition at line 148 of file mc_drv.h.

 
#define Get_EXT7 (  )     ((PIND & (1<<PD3))>>PD3)

Definition at line 149 of file mc_drv.h.

 
#define Get_EXT8 (  )     ((PIND & (1<<PD4))>>PD4)

Definition at line 150 of file mc_drv.h.

 
#define Get_EXT9 (  )     ((PINE & (1<<PE0))>>PE0)

Definition at line 151 of file mc_drv.h.

 
#define HALL_A (  )     (ANACOMP_0_vect)

Definition at line 43 of file mc_drv.h.

 
#define HALL_B (  )     (ANACOMP_1_vect)

Definition at line 44 of file mc_drv.h.

 
#define HALL_C (  )     (ANACOMP_2_vect)

Definition at line 45 of file mc_drv.h.

 
#define HALL_SENSOR_VALUE (  ) 

Value:

( (PIND & (1<<PIND7)) >> PIND7 ) \
  | ( (PINC & (1<<PINC6)) >> 5 )     \
  | ( (PIND & (1<<PIND5)) >> 3 )

Definition at line 52 of file mc_drv.h.

Referenced by mc_get_hall(), and timer1_periodic_interrupt().

#define MASK_DEMAG   2

Definition at line 61 of file mc_drv.h.

Referenced by timer1_periodic_interrupt().

#define MAX_DELAY   40

Definition at line 59 of file mc_drv.h.

Referenced by mc_estimation_speed().

#define MIN_DELAY   2

Definition at line 58 of file mc_drv.h.

Referenced by mc_estimation_speed().

#define OUTPUT_ACTIVE_HIGH   (1<<POP0)

Definition at line 39 of file mc_drv.h.

Referenced by PSC0_Init(), PSC1_Init(), and PSC2_Init().

#define OUTPUT_ACTIVE_LOW   (0<<POP0)

Definition at line 40 of file mc_drv.h.

#define output_disconnected   0x01

Definition at line 18 of file mc_drv.h.

#define PRESC_DIV_BY_16   (1<<PPRE01)|(0<<PPRE00)

Definition at line 36 of file mc_drv.h.

#define PRESC_DIV_BY_4   (0<<PPRE01)|(1<<PPRE00)

Definition at line 35 of file mc_drv.h.

Referenced by PSC0_Init(), PSC1_Init(), and PSC_Run().

#define PRESC_DIV_BY_64   (1<<PPRE01)|(1<<PPRE00)

Definition at line 37 of file mc_drv.h.

#define PRESC_NODIV   (0<<PPRE01)|(0<<PPRE00)

Definition at line 34 of file mc_drv.h.

#define PSC_CENTERED   (1<<PMODE01)|(1<<PMODE00)

Definition at line 27 of file mc_drv.h.

#define PSC_FOUR_RAMP   (1<<PMODE01)|(0<<PMODE00)

Definition at line 26 of file mc_drv.h.

#define PSC_ONE_RAMP   (0<<PMODE01)|(0<<PMODE00)

Definition at line 24 of file mc_drv.h.

#define PSC_TWO_RAMP   (0<<PMODE01)|(1<<PMODE00)

Definition at line 25 of file mc_drv.h.

#define RAMP_MODE_NUMBER   PSC_ONE_RAMP

Definition at line 29 of file mc_drv.h.

Referenced by mc_duty_cycle(), PSC0_Init(), PSC1_Init(), and PSC2_Init().

#define RELEASE_PLOCK   (0<<PLOCK0)

Definition at line 32 of file mc_drv.h.

Referenced by mc_duty_cycle().

 
#define Set_EXT1 (  )     (PORTB |= (1<<PB3))

Definition at line 120 of file mc_drv.h.

 
#define Set_EXT10 (  )     (PORTD |= (1<<PD2))

Definition at line 140 of file mc_drv.h.

 
#define Set_EXT2 (  )     (PORTB |= (1<<PB4))

Definition at line 122 of file mc_drv.h.

 
#define Set_EXT3 (  )     (PORTC |= (1<<PC1))

Definition at line 124 of file mc_drv.h.

Referenced by mc_regulation_loop().

 
#define Set_EXT4 (  )     (PORTC |= (1<<PC2))

Definition at line 126 of file mc_drv.h.

 
#define Set_EXT5 (  )     (PORTB |= (1<<PB5))

Definition at line 128 of file mc_drv.h.

 
#define Set_EXT6 (  )     (PORTE |= (1<<PE1))

Definition at line 130 of file mc_drv.h.

 
#define Set_EXT7 (  )     (PORTD |= (1<<PD3))

Definition at line 133 of file mc_drv.h.

 
#define Set_EXT8 (  )     (PORTD |= (1<<PD4))

Definition at line 135 of file mc_drv.h.

 
#define Set_EXT9 (  )     (PORTE |= (1<<PE0))

Definition at line 137 of file mc_drv.h.

 
#define Set_none (  ) 

Value:

PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
    PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
    PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
    Clear_Port_Q2();                \
    Clear_Port_Q4();                \
    Clear_Port_Q6();                \
    Clear_Port_Q1();                \
    Clear_Port_Q3();                \
    Clear_Port_Q5();

Definition at line 74 of file mc_drv.h.

Referenced by mc_switch_commutation(), and PSC_Stop().

#define SET_PLOCK   (1<<PLOCK0)

Definition at line 31 of file mc_drv.h.

Referenced by mc_duty_cycle().

 
#define Set_Port_Q2 (  )     (PORTB |= (1<<PORTB1))

Definition at line 69 of file mc_drv.h.

 
#define Set_Port_Q4 (  )     (PORTB |= (1<<PORTB6))

Definition at line 70 of file mc_drv.h.

 
#define Set_Port_Q6 (  )     (PORTB |= (1<<PORTB7))

Definition at line 71 of file mc_drv.h.

 
#define Set_Q1Q4 (  ) 

Value:

PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
    PSOC1 = (0<<POEN1A)|(1<<POEN1B);\
    PSOC2 = (1<<POEN2A)|(0<<POEN2B);

Definition at line 85 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_Q1Q6 (  ) 

Value:

PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
    PSOC0 = (0<<POEN0A)|(1<<POEN0B);\
    PSOC2 = (1<<POEN2A)|(0<<POEN2B);

Definition at line 90 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_Q3Q2 (  ) 

Value:

PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
    PSOC1 = (1<<POEN1A)|(0<<POEN1B);\
    PSOC2 = (0<<POEN2A)|(1<<POEN2B);

Definition at line 95 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_Q3Q6 (  ) 

Value:

PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
    PSOC0 = (0<<POEN0A)|(1<<POEN0B);\
    PSOC1 = (1<<POEN1A)|(0<<POEN1B);

Definition at line 100 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_Q5Q2 (  ) 

Value:

PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
    PSOC0 = (1<<POEN0A)|(0<<POEN0B);\
    PSOC2 = (0<<POEN2A)|(1<<POEN2B);

Definition at line 105 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_Q5Q4 (  ) 

Value:

PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
    PSOC0 = (1<<POEN0A)|(0<<POEN0B);\
    PSOC1 = (0<<POEN1A)|(1<<POEN1B);

Definition at line 110 of file mc_drv.h.

Referenced by mc_switch_commutation().

 
#define Set_timer_data_register_to_zero (  )     (TCNT0=0x00)

Definition at line 21 of file mc_drv.h.

 
#define switch_OFF_LED (  )     (PORTE |= (1<<PE2))

Definition at line 117 of file mc_drv.h.

Referenced by main().

 
#define switch_ON_LED (  )     (PORTE &= ~(1<<PE2))

Definition at line 116 of file mc_drv.h.

Referenced by main().

 
#define Toggle_EXT6 (  )     (PINE |= (1<<PINE1))

Definition at line 132 of file mc_drv.h.

 
#define Toggle_EXT9 (  )     (PINE |= (1<<PINE0))

Definition at line 139 of file mc_drv.h.

Function Documentation

void mc_ADC_Scheduler ( void   ) 

Launch the scheduler for the ADC.

Precondition:
none
Postcondition:
Get Channel 6 and 12 results for Potentiometer and current values.

Definition at line 652 of file mc_drv.c.

References ADC_State, BUSY, CONV_CURRENT, CONV_INIT, CONV_POT, FREE, init_adc(), Left_adjust_adc_result, Right_adjust_adc_result, Start_amplified_conv_channel, Start_conv_channel, and State.

Referenced by main().

00653 {
00654   switch(State)
00655   {
00656   case CONV_INIT :
00657     init_adc();
00658     init_amp1();
00659     ADC_State = FREE;
00660     State = CONV_POT;
00661     break;
00662 
00663   case CONV_POT :
00664     if(ADC_State == FREE)
00665     {
00666       ADC_State = BUSY;
00667       State= CONV_CURRENT;
00668       Left_adjust_adc_result();
00669       Start_conv_channel(6);
00670     }
00671     break;
00672 
00673   case CONV_CURRENT :
00674     if(ADC_State == FREE)
00675     {
00676       ADC_State = BUSY;
00677       State = CONV_POT;
00678       Right_adjust_adc_result();
00679       Start_amplified_conv_channel(12);
00680 //      Start_conv_channel(9);
00681     }
00682     break;
00683   }
00684 
00685 }

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void mc_config_sampling_period ( void   ) 

Timer 1 Configuration Use to generate a 250us activation for main loop.

Precondition:
None
Postcondition:
An interrupt all 250us

Definition at line 495 of file mc_drv.c.

References CS10, CS11, OCIE1A, and WGM12.

Referenced by mc_init_HW().

00496 {
00497   TCCR1A = 0;         /* Normal port operation + Mode CTC */
00498   TCCR1B = 1<<WGM12 | 1<<CS11 | 1<<CS10 ; /* Mode CTC + prescaler 64 */
00499   TCCR1C = 0;
00500   OCR1AH = 0;
00501   OCR1AL = 7;         /* 31.25 µS */
00502   TIMSK1=(1<<OCIE1A); /* Output compare B Match interrupt Enable */
00503 }

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void mc_config_time_estimation_speed ( void   ) 

Timer 0 Configuration The timer 0 is used to generate an IT when an overflow occurs.

Precondition:
None
Postcondition:
Timer0 initialized.

Definition at line 559 of file mc_drv.c.

References CS00, CS01, CS02, and TOIE0.

Referenced by mc_init_HW().

00560 {
00561   TCCR0A = 0;
00562   TCCR0B = (0<<CS02)|(1<<CS01)|(1<<CS00); // 64 prescaler (8us)
00563   TIMSK0 = (1<<TOIE0);
00564 }

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void mc_duty_cycle ( U8  level  ) 

Set the duty cycle values in the PSC according to the value calculate by the regulation loop.

Definition at line 379 of file mc_drv.c.

References PCLKSEL0, PCLKSEL1, PCLKSEL2, POP0, POP1, POP2, RAMP_MODE_NUMBER, RELEASE_PLOCK, and SET_PLOCK.

Referenced by mc_switch_commutation().

00380 {
00381   U8 duty;
00382   duty = level;
00383 
00384   PCNF0 = SET_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL0)|(1<<POP0); /* set plock */
00385   PCNF1 = SET_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL1)|(1<<POP1); /* set plock */
00386   PCNF2 = SET_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL2)|(1<<POP2); /* set plock */
00387 
00388   // Duty = 0   => Duty Cycle   0%
00389   // Duty = 255 => Duty Cycle 100%
00390 
00391   // Set the duty cycle for PSCn0
00392   OCR0SAH = 0;
00393   OCR0SAL = 255 - duty;
00394 
00395   OCR1SAH = 0;
00396   OCR1SAL = 255 - duty;
00397 
00398   OCR2SAH = 0;
00399   OCR2SAL = 255 - duty;
00400 
00401   // Set the duty cycle for PSCn1 according to the PWM strategy
00402   #ifdef HIGH_AND_LOW_PWM
00403   // apply PWM on high side and low side switches
00404     OCR0SBH = 0;
00405     OCR0SBL = 255 - duty  ;
00406 
00407     OCR1SBH = 0;
00408     OCR1SBL = 255 - duty  ;
00409 
00410     OCR2SBH = 0;
00411     OCR2SBL = 255 - duty  ;
00412   #else
00413   // PWM is only applied on high side switches
00414   // 100% duty cycle on low side switches
00415     OCR0SBH = 0;
00416     OCR0SBL = 2;
00417 
00418     OCR1SBH = 0;
00419     OCR1SBL = 2;
00420 
00421     OCR2SBH = 0;
00422     OCR2SBL = 2;
00423   #endif
00424 
00425   Disable_interrupt();
00426   PCNF0 = RELEASE_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL0)|(1<<POP0); /* release plock */
00427   PCNF1 = RELEASE_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL1)|(1<<POP1); /* release plock */
00428   PCNF2 = RELEASE_PLOCK | RAMP_MODE_NUMBER |(1<<PCLKSEL2)|(1<<POP2); /* release plock */
00429   Enable_interrupt();
00430 }

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void mc_estimation_speed ( void   ) 

estimation speed

Precondition:
configuration of timer 0 and define or not AVERAGE_SPEED_MEASURE in config_motor.h
Postcondition:
new value for real speed

Definition at line 590 of file mc_drv.c.

References average, comp_delay_30d, count, FILTER_DELAY, g_mc_read_enable, K_SPEED, KO, MAX_DELAY, mci_store_measured_speed(), MIN_DELAY, OK, and ovf_timer.

Referenced by mc_hall_a().

00591 {
00592   U16 timer_value;
00593   U32 new_measured_speed;
00594 
00595   if (g_mc_read_enable==OK)
00596   {
00597     // Two 8 bits variables are use to simulate a 16 bits timers
00598     timer_value = (ovf_timer<<8) + TCNT0;
00599 
00600     /* compute delay for 30 degres */
00601     comp_delay_30d = (timer_value / 94) - FILTER_DELAY;
00602     /* apply a saturation */
00603     if (comp_delay_30d < (S16)MIN_DELAY) comp_delay_30d = MIN_DELAY;
00604     else if (comp_delay_30d > (S16)MAX_DELAY) comp_delay_30d = MAX_DELAY;
00605 
00606     if (timer_value == 0) {timer_value += 1 ;} // warning DIV by 0
00607     new_measured_speed = K_SPEED / timer_value;
00608     if(new_measured_speed > 255) new_measured_speed = 255; // Variable saturation
00609 
00610 
00611       // To avoid noise an average is realized on 16 samples
00612       average += new_measured_speed;
00613       if(count >= 16)
00614       {
00615         count = 1;
00616         mci_store_measured_speed(average >> 4);
00617         average = 0;
00618       }
00619       else count++;
00620 
00621     // Reset Timer 0 register and variables
00622     TCNT0=0x00;
00623     ovf_timer = 0;
00624     g_mc_read_enable=KO;
00625   }
00626 }

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U8 mc_Get_Current ( void   ) 

U8 mc_get_hall ( void   ) 

Get the value of hall sensors (1 to 6).

Parameters:
return an unsigned char value of hall sensor
Precondition:
configuration of port PB and PD
Postcondition:
new value of position

Definition at line 288 of file mc_drv.c.

References HALL_SENSOR_VALUE.

00289 {
00290   return HALL_SENSOR_VALUE(); /* sensor */
00291 //  return ((~HALL_SENSOR_VALUE())&0x07); /* sensorless */
00292 }

S32 mc_get_Num_Turn ( void   ) 

Get the number of rotor rotation.

Precondition:
none
Postcondition:
Get the 32bits signed number of turns

Definition at line 715 of file mc_drv.c.

References Num_turn.

Referenced by mc_control_position().

00716 {
00717   return Num_turn;
00718 }

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U8 mc_Get_Potentiometer ( void   ) 

void mc_init_HW ( void   ) 

init hardware (peripherals)

Precondition:
set all functions mc_init_port(), mc_init_pwm()...
Postcondition:
initialization of hardware

Definition at line 57 of file mc_drv.c.

References init_comparator0(), init_comparator1(), init_comparator2(), init_dac(), mc_config_sampling_period(), mc_config_time_estimation_speed(), mc_init_IT(), mc_init_port(), mc_init_pwm(), and mc_set_Over_Current().

Referenced by mc_motor_init().

00058 {
00059   mc_init_port();
00060   mc_init_IT();
00061 
00062   // Be careful : initialize DAC and Over_Current before PWM.
00063   init_dac();
00064   mc_set_Over_Current(200); // 5 => 1A ; 8 => 40A
00065   mc_init_pwm();
00066 
00067   mc_config_time_estimation_speed();
00068   mc_config_sampling_period();
00069 
00070   init_comparator0();
00071   init_comparator1();
00072   init_comparator2();
00073 }

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void mc_init_IT ( void   ) 

Initialization of AT90PWM3B External Interrupts.

Precondition:
none
Postcondition:
External Interrupts (INT0, INT1, INT2, INT3) initialized

Definition at line 168 of file mc_drv.c.

References INT0, INT1, INT2, INTF0, INTF1, INTF2, ISC00, ISC01, ISC10, ISC11, ISC20, and ISC21.

Referenced by mc_init_HW().

00169 {
00170   EICRA =(0<<ISC21)|(1<<ISC20)|(0<<ISC11)|(1<<ISC10)|(0<<ISC01)|(1<<ISC00);
00171   EIFR = (1<<INTF2)|(1<<INTF1)|(1<<INTF0); // clear possible IT due to config
00172   EIMSK=(1<<INT2)|(1<<INT1)|(1<<INT0);
00173 }

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void mc_init_port ( void   ) 

Initialization of IO PORTS for AT90PWM3B.

Precondition:
none
Postcondition:
initialization of I/O Ports

Definition at line 90 of file mc_drv.c.

References ACMP0D, ACMP1D, ADC2D, ADC3D, ADC6D, AMP1ND, AMP1PD, DDB0, DDB1, DDB3, DDB4, DDB5, DDB6, DDB7, DDC0, DDC1, DDC2, DDD0, DDD2, DDD3, DDD4, DDE0, DDE1, DDE2, PORTB0, PORTB1, PORTB3, PORTB6, PORTB7, PORTC0, PORTC1, PORTC6, PORTD0, PORTD1, PORTD5, and PORTD7.

Referenced by mc_init_HW().

00091 {
00092   // Output Pin configuration
00093   // PD0 => H_A     PB7 => L_A
00094   // PC0 => H_B     PB6 => L_B
00095   // PB0 => H_C     PB1 => L_C
00096 
00097   //Do not modify PSCOUT Configuration
00098   // PORT B :
00099   DDRB = (1<<DDB7)|(1<<DDB6)|(1<<DDB3)|(1<<DDB1)|(1<<DDB0);
00100   // PORT C :
00101   DDRC = (1<<DDC0);
00102   // PORT D :
00103   DDRD = (1<<DDD0);
00104 
00105 
00106   // DDnx = 0:Input 1:Output    (n = B,C,D,E ; x = 0,1,2,3,4,5,6,7)
00107   // PB3 => EXT1                        PB4 => EXT2
00108   // PC1 => EXT3                        PC2 => EXT4
00109   // PB5 => EXT5/POT                    PE1 => EXT6
00110   // PD3 => EXT7/MOSI/LIN_TxD/TxD       PD4 => EXT8/MISO/LIN_RxD/RxD
00111   // PE0 => EXT9/NRES                   PD2 => EXT10/MISO
00112 
00113   // Modify DDnx according to your hardware implementation
00114   // PORT B :
00115   DDRB |= (0<<DDB5)|(1<<DDB4)|(0<<DDB3);
00116   // PORT C :
00117   DDRC |= (0<<DDC2)|(0<<DDC1);
00118     // PORT D :
00119   DDRD |= (0<<DDD4)|(0<<DDD3)|(0<<DDD2); // Becareful if using the UART interface or JTAGE ICE mkII.
00120   // PORT E :
00121   DDRE |= (1<<DDE2)|(0<<DDE1)|(0<<DDE0); // Becareful PE0 is you by JTAGE ICE mkII.
00122 
00123 
00124   // Warning Output Low for MOSFET Drivers
00125   PORTB &= ~(1<<PORTB7 | 1<<PORTB6 | 1<<PORTB3 |1<<PORTB1 | 1<<PORTB0);
00126   PORTC &= ~(1<<PORTC0);
00127   PORTD &= ~(1<<PORTD0);
00128 
00129   // pull up activation
00130   PORTC |= (1<<PORTC6)|(1<<PORTC1);
00131   PORTD |= (1<<PORTD7)|(1<<PORTD5)|(1<<PORTD1);
00132 
00133   // Disable Digital Input for amplifier1
00134   // Digitals Inputs for comparators are not disable.
00135   DIDR0 = (0<<ADC6D)|(0<<ADC3D)|(0<<ADC2D);
00136   DIDR1 = (0<<ACMP0D)|(0<<ACMP1D)|(1<<AMP1PD)|(1<<AMP1ND);
00137 }

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void mc_init_pwm ( void   ) 

Initialization of PWM generators (PSC) for AT90PWM3B.

Precondition:
none
Postcondition:
initialization of PSC

Definition at line 144 of file mc_drv.c.

References PSC0_Init(), PSC1_Init(), PSC2_Init(), Start_pll_32_mega, and Wait_pll_ready.

Referenced by mc_init_HW().

00145 {
00146   Start_pll_32_mega();
00147   Wait_pll_ready();
00148 
00149   // In Center Aligned Mode :
00150   // => PSCx_Init(Period_Half, Dutyx0_Half, Synchro, Dutyx1_Half)
00151 #ifdef MCU_REV_B
00152   PSC0_Init(255,0,255,0);
00153   PSC1_Init(255,0,255,0);
00154   PSC2_Init(255,0,255,0);
00155 #else
00156   PSC0_Init(255,0,1,0);
00157   PSC1_Init(255,0,1,0);
00158   PSC2_Init(255,0,1,0);
00159 #endif
00160 
00161 }

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void mc_init_SW ( void   ) 

init SW

Precondition:
none
Postcondition:
initialization of software

Definition at line 80 of file mc_drv.c.

Referenced by mc_motor_init().

00081 {
00082   Enable_interrupt();
00083 }

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void mc_reset_Num_Turn ( void   ) 

Reset the number of rotor rotation.

Precondition:
none
Postcondition:
Number of turns = 0

Definition at line 725 of file mc_drv.c.

References Num_turn.

00726 {
00727   Num_turn = 0;
00728 }

void mc_set_Over_Current ( U8  Level  ) 

Set the Over Current threshold.

Precondition:
DAC initialization
Postcondition:
the Over Current threshold is set.

Definition at line 698 of file mc_drv.c.

References Set_dac_8_bits.

Referenced by mc_init_HW().

00699 {
00700   Set_dac_8_bits(Level);
00701 }

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void mc_switch_commutation ( U8  position  ) 

Set the Switching Commutation value on outputs according to sensor or estimation position.

Parameters:
position (1 to 6) and direction (FORWARD or BACKWARD)

Definition at line 438 of file mc_drv.c.

References CCW, HS_001, HS_010, HS_011, HS_100, HS_101, HS_110, mc_duty_cycle(), mc_get_Duty_Cycle(), mci_get_motor_direction, mci_get_motor_speed(), mci_motor_is_running(), Set_none, Set_Q1Q4, Set_Q1Q6, Set_Q3Q2, Set_Q3Q6, Set_Q5Q2, and Set_Q5Q4.

Referenced by main(), and timer1_periodic_interrupt().

00439 {
00440   // get the motor direction to commute the right switches.
00441   char direction = mci_get_motor_direction();
00442 
00443   // Switches are commuted only if the user start the motor and
00444   // the speed consign is different from 0.
00445   if ((mci_motor_is_running()) && (mci_get_motor_speed()!=0))
00446   {
00447     mc_duty_cycle(mc_get_Duty_Cycle());
00448     switch(position)
00449     {
00450     // cases according to rotor position
00451       case HS_001:  if (direction==CCW)  {Set_Q3Q2();}
00452                     else                 {Set_Q5Q2();}
00453                     break;
00454 
00455       case HS_101:  if (direction==CCW)  {Set_Q5Q2();}
00456                     else                 {Set_Q5Q4();}
00457                     break;
00458 
00459       case HS_100:  if (direction==CCW)  {Set_Q5Q4();}
00460                     else                 {Set_Q1Q4();}
00461                     break;
00462 
00463       case HS_110:  if (direction==CCW)  {Set_Q1Q4();}
00464                     else                 {Set_Q1Q6();}
00465                     break;
00466 
00467       case HS_010:  if (direction==CCW)  {Set_Q1Q6();}
00468                     else                 {Set_Q3Q6();}
00469                     break;
00470 
00471       case HS_011:  if (direction==CCW)  {Set_Q3Q6();}
00472                     else                 {Set_Q3Q2();}
00473                     break;
00474       default : break;
00475       }
00476   }
00477   else
00478   {
00479     Set_none(); // all switches are switched OFF
00480   }
00481 }

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void PSC0_Init ( unsigned int  OCRnRB,
unsigned int  OCRnSB,
unsigned int  OCRnRA,
unsigned int  OCRnSA 
)

Initialization of PWM generator PSC0.

Definition at line 184 of file mc_drv.c.

References HIGH, LOW, OUTPUT_ACTIVE_HIGH, PAOC0A, PARUN0, PCLKSEL0, PELEV0A, PFLTE0A, PRESC_DIV_BY_4, PRFM0A0, PRFM0A1, PRFM0A2, PRFM0A3, PSYNC00, and RAMP_MODE_NUMBER.

Referenced by mc_init_pwm().

00188 {
00189   OCR0SAH = HIGH(OCRnSA);
00190   OCR0SAL = LOW(OCRnSA);
00191   OCR0RAH = HIGH(OCRnRA);
00192   OCR0RAL = LOW(OCRnRA);
00193   OCR0SBH = HIGH(OCRnSB);
00194   OCR0SBL = LOW(OCRnSB);
00195   OCR0RBH = HIGH(OCRnRB);
00196   OCR0RBL = LOW(OCRnRB);
00197 
00198   PCNF0 =  RAMP_MODE_NUMBER | (1<<PCLKSEL0) | OUTPUT_ACTIVE_HIGH ;
00199   /* use PSC 0  Input A as Fault Input */
00200   PFRC0A = (1<<PELEV0A)|(1<<PFLTE0A)|(0<<PRFM0A3)|(1<<PRFM0A2)|(1<<PRFM0A1)|(1<<PRFM0A0);
00201 //  PFRC0A = 0;
00202   PFRC0B = 0;
00203   PSOC0 = (1<<PSYNC00); //Send signal on match with OCRnSA (during counting up of PSC)
00204   PCTL0 = (0<<PAOC0A)|(1<<PARUN0)|PRESC_DIV_BY_4; /* AUTORUN !! */
00205 }

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void PSC1_Init ( unsigned int  OCRnRB,
unsigned int  OCRnSB,
unsigned int  OCRnRA,
unsigned int  OCRnSA 
)

Initialization of PWM generator PSC1.

Definition at line 210 of file mc_drv.c.

References HIGH, LOW, OUTPUT_ACTIVE_HIGH, PAOC1A, PARUN1, PCLKSEL1, PRESC_DIV_BY_4, and RAMP_MODE_NUMBER.

Referenced by mc_init_pwm().

00214 {
00215   OCR1SAH = HIGH(OCRnSA);
00216   OCR1SAL = LOW(OCRnSA);
00217   OCR1RAH = HIGH(OCRnRA);
00218   OCR1RAL = LOW(OCRnRA);
00219   OCR1SBH = HIGH(OCRnSB);
00220   OCR1SBL = LOW(OCRnSB);
00221   OCR1RBH = HIGH(OCRnRB);
00222   OCR1RBL = LOW(OCRnRB);
00223 
00224   PCNF1 =  RAMP_MODE_NUMBER | (1<<PCLKSEL1) | OUTPUT_ACTIVE_HIGH ;
00225   PFRC1A = 0;
00226   PFRC1B = 0;
00227   PCTL1 = (0<<PAOC1A)|(1<<PARUN1)|PRESC_DIV_BY_4; /* AUTORUN !! */
00228 }

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void PSC2_Init ( unsigned int  OCRnRB,
unsigned int  OCRnSB,
unsigned int  OCRnRA,
unsigned int  OCRnSA 
)

Initialization of PWM generator PSC2.

Definition at line 234 of file mc_drv.c.

References HIGH, LOW, OUTPUT_ACTIVE_HIGH, PCLKSEL2, and RAMP_MODE_NUMBER.

Referenced by mc_init_pwm().

00238 {
00239   OCR2SAH = HIGH(OCRnSA);
00240   OCR2SAL = LOW(OCRnSA);
00241   OCR2RAH = HIGH(OCRnRA);
00242   OCR2RAL = LOW(OCRnRA);
00243   OCR2SBH = HIGH(OCRnSB);
00244   OCR2SBL = LOW(OCRnSB);
00245   OCR2RBH = HIGH(OCRnRB);
00246   OCR2RBL = LOW(OCRnRB);
00247 
00248   PCNF2 =  RAMP_MODE_NUMBER | (1<<PCLKSEL2) | OUTPUT_ACTIVE_HIGH ;
00249   PFRC2A = 0;
00250   PFRC2B = 0;
00251 //  PCTL2 = (0<<PAOC2A)|(1<<PRUN2)|PRESC_DIV_BY_4; /* RUN !! */
00252 }

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void PSC_Run ( void   ) 

Definition at line 270 of file mc_drv.c.

References PAOC2A, PRESC_DIV_BY_4, and PRUN2.

Referenced by mci_run().

00271 {
00272   PCTL2 = (0<<PAOC2A)|(1<<PRUN2)|PRESC_DIV_BY_4; /* RUN !! */
00273 }

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void PSC_Stop ( void   ) 

Definition at line 259 of file mc_drv.c.

References PCCYC2, and Set_none.

Referenced by mci_stop().

00260 {
00261    Set_none();
00262    PCTL2 = (1<<PCCYC2);
00263 }

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