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Defines |
| #define | Disable_psc2_autolock_mode() (PCNF2 &= ~(1<<PALOCK2) ) |
| | The update will be procced according to PLOCK2 bit.
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| #define | Disable_psc2_fifty_percent_mode() (PCNF2 &= ~(1<<PFIFTY2) ) |
| | OCR2R/SAH/L and OCR2R/SBH/L are fully independant.
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| #define | Enable_psc2_autolock_mode() (PCNF2 |= (1<<PALOCK2) ) |
| | OCR2R/SAH/L and OCR2R/SBH/L can be written without disturbing the PSC cycle. The update of these registers will be proceed at the end of the PSC cycle if the OCR2RB has been last written.
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| #define | Enable_psc2_fifty_percent_mode() (PCNF2 |= (1<<PFIFTY2) ) |
| | PSC2 is in 50% mode: Only OCR2RBH/L and OCR2SBH/L are used. They are duplicated in OCR2R/SAH/L during the update of OCR2BH/L.
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| #define | Lock_psc2_compare_values() (PCNF2 |= (1<<PLOCK2) ) |
| | Take care that the lock is active only if you have disabled the autolock mode.
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| #define | Update_psc2_compare_values() (PCNF2 &= ~(1<<PLOCK2) ) |
| | The compare registers will be updated with the content of OCR2AH/L and OCR2BH.
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