PSC1 Mode Control
[PSC1 Macros]

Collaboration diagram for PSC1 Mode Control:

---

Detailed Description

PSC1 Mode Control.

Defines
#define	Disable_psc1_autolock_mode()   (PCNF1 &= ~(1<<PALOCK1) )
	The update will be procced according to PLOCK1 bit.
#define	Disable_psc1_fifty_percent_mode()   (PCNF1 &= ~(1<<PFIFTY1) )
	OCR1R/SAH/L and OCR1R/SBH/L are fully independant.
#define	Enable_psc1_autolock_mode()   (PCNF1 |= (1<<PALOCK1) )
	OCR1R/SAH/L and OCR1R/SBH/L can be written without disturbing the PSC cycle. The update of these registers will be proceed at the end of the PSC cycle if the OCR1RB has been last written.
#define	Enable_psc1_fifty_percent_mode()   (PCNF1 |= (1<<PFIFTY1) )
	PSC1 is in 50% mode: Only OCR1RBH/L and OCR1SBH/L are used. They are duplicated in OCR1R/SAH/L during the update of OCR1BH/L.
#define	Lock_psc1_compare_values()   (PCNF1 |= (1<<PLOCK1) )
	Take care that the lock is active only if you have disabled the autolock mode.
#define	Update_psc1_compare_values()   (PCNF1 &= ~(1<<PLOCK1) )
	The compare registers will be updated with the content of OCR1AH/L and OCR1BH.

---

Define Documentation

 

#define Disable_psc1_autolock_mode

(

)

(PCNF1 &= ~(1<<PALOCK1) )

The update will be procced according to PLOCK1 bit.

Definition at line 265 of file psc_drv.h.

 

#define Disable_psc1_fifty_percent_mode

(

)

(PCNF1 &= ~(1<<PFIFTY1) )

OCR1R/SAH/L and OCR1R/SBH/L are fully independant.

Definition at line 262 of file psc_drv.h.

 

#define Enable_psc1_autolock_mode

(

)

(PCNF1 |= (1<<PALOCK1) )

OCR1R/SAH/L and OCR1R/SBH/L can be written without disturbing the PSC cycle. The update of these registers will be proceed at the end of the PSC cycle if the OCR1RB has been last written.

Definition at line 264 of file psc_drv.h.

 

#define Enable_psc1_fifty_percent_mode

(

)

(PCNF1 |= (1<<PFIFTY1) )

PSC1 is in 50% mode: Only OCR1RBH/L and OCR1SBH/L are used. They are duplicated in OCR1R/SAH/L during the update of OCR1BH/L.

Definition at line 261 of file psc_drv.h.

 

#define Lock_psc1_compare_values

(

)

(PCNF1 |= (1<<PLOCK1) )

Take care that the lock is active only if you have disabled the autolock mode.

Definition at line 267 of file psc_drv.h.

 

#define Update_psc1_compare_values

(

)

(PCNF1 &= ~(1<<PLOCK1) )

The compare registers will be updated with the content of OCR1AH/L and OCR1BH.

Definition at line 268 of file psc_drv.h.

---