PSC1 Interrupt Configuration
[PSC1 Macros]

Collaboration diagram for PSC1 Interrupt Configuration:


Detailed Description

PSC1 interrupt configuration.


Defines

#define Disable_psc1_end_of_cycle_interrupt()   (PIM1 &= ~(1<<PEVE1A) )
 No interrupt is generated when PSC1 reaches the end of the whole cycle.
#define Disable_psc1_external_event_a_interrupt()   (PIM1 &= ~(1<<PEVE1A) )
 An external event which can generate a capture from retrigger/fault block A doesn't generate any interrupt.
#define Disable_psc1_external_event_b_interrupt()   (PIM1 &= ~(1<<PEVE1B) )
 An external event which can generate a capture from retrigger/fault block B doesn't generate any interrupt.
#define Disable_psc1_synchro_error_interrupt()   (PIM1 &= ~(1<<PSEIE1) )
 No interrupt is generated when the PSEI0 bit is set.
#define Enable_psc1_end_of_cycle_interrupt()   (PIM1 |= (1<<PEVE1A) )
 An interrupt is generated when PSC1 reaches the end of the whole cycle.
#define Enable_psc1_external_event_a_interrupt()   (PIM1 |= (1<<PEVE1A) )
 An external event which can generate a capture from retrigger/fault block A generates an interrupt.
#define Enable_psc1_external_event_b_interrupt()   (PIM1 |= (1<<PEVE1B) )
 An external event which can generate a capture from retrigger/fault block B generates an interrupt.
#define Enable_psc1_synchro_error_interrupt()   (PIM1 |= (1<<PSEIE1) )
 An interrupt is generated when the PSEI0 bit is set.


Define Documentation

 
#define Disable_psc1_end_of_cycle_interrupt (  )     (PIM1 &= ~(1<<PEVE1A) )

No interrupt is generated when PSC1 reaches the end of the whole cycle.

Definition at line 401 of file psc_drv.h.

 
#define Disable_psc1_external_event_a_interrupt (  )     (PIM1 &= ~(1<<PEVE1A) )

An external event which can generate a capture from retrigger/fault block A doesn't generate any interrupt.

Definition at line 395 of file psc_drv.h.

 
#define Disable_psc1_external_event_b_interrupt (  )     (PIM1 &= ~(1<<PEVE1B) )

An external event which can generate a capture from retrigger/fault block B doesn't generate any interrupt.

Definition at line 398 of file psc_drv.h.

 
#define Disable_psc1_synchro_error_interrupt (  )     (PIM1 &= ~(1<<PSEIE1) )

No interrupt is generated when the PSEI0 bit is set.

Definition at line 392 of file psc_drv.h.

 
#define Enable_psc1_end_of_cycle_interrupt (  )     (PIM1 |= (1<<PEVE1A) )

An interrupt is generated when PSC1 reaches the end of the whole cycle.

Definition at line 400 of file psc_drv.h.

 
#define Enable_psc1_external_event_a_interrupt (  )     (PIM1 |= (1<<PEVE1A) )

An external event which can generate a capture from retrigger/fault block A generates an interrupt.

Definition at line 394 of file psc_drv.h.

 
#define Enable_psc1_external_event_b_interrupt (  )     (PIM1 |= (1<<PEVE1B) )

An external event which can generate a capture from retrigger/fault block B generates an interrupt.

Definition at line 397 of file psc_drv.h.

 
#define Enable_psc1_synchro_error_interrupt (  )     (PIM1 |= (1<<PSEIE1) )

An interrupt is generated when the PSEI0 bit is set.

Definition at line 391 of file psc_drv.h.


Generated on Wed Jul 12 16:55:33 2006 for Atmel BLDC Sensorless on ATAVRMC100 by  doxygen 1.4.7