PSC1 Clock Selection
[PSC1 Clock Control]

Collaboration diagram for PSC1 Clock Selection:

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Detailed Description

PSC1 Clock Selection.

Defines
#define	Psc1_use_32_mega_pll_clock()
	Start the PLL at 32MHz and connect it to PSC1.
#define	Psc1_use_64_mega_pll_clock()
	Start the PLL at 64MHz and connect it to PSC1.
#define	Psc1_use_io_clock()   (PCNF1 &= ~(1<<PCLKSEL0) )
	Connect the PSC1 input clock to the I/O clock.
#define	Psc1_use_pll_clock()   (PCNF1 |= (1<<PCLKSEL0) )
	Connect the PSC1 input clock to the PLL.

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Define Documentation

 

#define Psc1_use_32_mega_pll_clock

(

)

Value:

(Start_pll_32_mega(),                                               \
           Wait_pll_ready(),                                                  \
           Psc1_use_pll_clock() )

Start the PLL at 32MHz and connect it to PSC1.

Definition at line 288 of file psc_drv.h.

 

#define Psc1_use_64_mega_pll_clock

(

)

Value:

(Start_pll_64_mega(),                                               \
           Wait_pll_ready(),                                                  \
           Psc1_use_pll_clock() )

Start the PLL at 64MHz and connect it to PSC1.

Definition at line 283 of file psc_drv.h.

 

#define Psc1_use_io_clock

(

)

(PCNF1 &= ~(1<<PCLKSEL0) )

Connect the PSC1 input clock to the I/O clock.

Definition at line 281 of file psc_drv.h.

 

#define Psc1_use_pll_clock

(

)

(PCNF1 |= (1<<PCLKSEL0) )

Connect the PSC1 input clock to the PLL.

Definition at line 279 of file psc_drv.h.

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