Collaboration diagram for PSC0 Interrupt Flag Control:
|
Defines | |
| #define | Clear_psc0_end_of_cycle_interrupt_flag() (PIFR0 &= ~(1<<PEOP2) ) |
| Clear PEOP2 bit in PIFR0 register. | |
| #define | Clear_psc0_external_event_a_interrupt_flag() (PIFR0 &= ~(1<<PEV0A) ) |
| Clear PEV0A bit in PIFR0 register. | |
| #define | Clear_psc0_external_event_b_interrupt_flag() (PIFR0 &= ~(1<<PEV0B) ) |
| Clear PEV0B bit in PIFR0 register. | |
| #define | Clear_psc0_synchro_error_interrupt_flag() (PIFR0 &= ~(1<<PSEI0) ) |
| Clear PSEI0 bit in PIFR0 register. | |
| #define | Is_psc0_end_of_cycle_interrupt_flag_set() (PIFR0 & (1<<PEOP2) ) |
| Return 1 if the PE0P2 bit in PIFR0 is set. | |
| #define | Is_psc0_external_event_a_interrupt_flag_set() (PIFR0 & (1<<PEV0A) ) |
| Return 1 if the PEV0A bit in PIFR0 is set. | |
| #define | Is_psc0_external_event_b_interrupt_flag_set() (PIFR0 & (1<<PEV0B) ) |
| Return 1 if the PEV0B bit in PIFR0 is set. | |
| #define | Is_psc0_synchro_error_interrupt_flag_set() (PIFR0 & (1<<PSEI0) ) |
| Return 1 if the PSEI0 bit in PIFR0 is set. | |
| #define Clear_psc0_end_of_cycle_interrupt_flag | ( | ) | (PIFR0 &= ~(1<<PEOP2) ) |
| #define Clear_psc0_external_event_a_interrupt_flag | ( | ) | (PIFR0 &= ~(1<<PEV0A) ) |
| #define Clear_psc0_external_event_b_interrupt_flag | ( | ) | (PIFR0 &= ~(1<<PEV0B) ) |
| #define Clear_psc0_synchro_error_interrupt_flag | ( | ) | (PIFR0 &= ~(1<<PSEI0) ) |
| #define Is_psc0_end_of_cycle_interrupt_flag_set | ( | ) | (PIFR0 & (1<<PEOP2) ) |
| #define Is_psc0_external_event_a_interrupt_flag_set | ( | ) | (PIFR0 & (1<<PEV0A) ) |
| #define Is_psc0_external_event_b_interrupt_flag_set | ( | ) | (PIFR0 & (1<<PEV0B) ) |
| #define Is_psc0_synchro_error_interrupt_flag_set | ( | ) | (PIFR0 & (1<<PSEI0) ) |
1.4.7