Collaboration diagram for ADC Defines Configuration Values:
|
Modules | |
| DAC Defines Configuration Values | |
| Defines allowing to init the DAC with the wanted configuration. | |
Defines | |
| #define | ADC_HIGH_SPEED_MODE 1 |
| #define | ADC_INTERNAL_VREF 1 |
| 0: External Vref 1: Internal Vref 2: Vref is connected to Vcc | |
| #define | ADC_IT 1 |
| 0: No ADC End of Conv IT 1: ADC End of conversion generates an IT | |
| #define | ADC_PRESCALER 4 |
| 2, 4, 8, 16, 32, 64, 128 : The input ADC frequency is the system clock frequency divided by the const value | |
| #define | ADC_RIGHT_ADJUST_RESULT 0 |
| 0: Result left adjusted 1: Result right adjusted | |
| #define | USE_ADC |
| #define ADC_INTERNAL_VREF 1 |
| #define ADC_IT 1 |
| #define ADC_PRESCALER 4 |
| #define ADC_RIGHT_ADJUST_RESULT 0 |
1.4.7