compiler.h

Go to the documentation of this file.
00001 /*H**************************************************************************
00002 * $RCSfile: compiler.h,v $
00003 *----------------------------------------------------------------------------
00004 * Copyright (c) 2003 Atmel.
00005 *----------------------------------------------------------------------------
00006 * RELEASE:      $Name: mc100_bldc_sensorless_0_1_0 $
00007 * FILE_REV:     $Revision: 1.13.2.20 $
00008 * FILE_CVSID:   $Id: compiler.h,v 1.13.2.20 2006/02/01 17:06:52 rletendu Exp $
00009 *----------------------------------------------------------------------------
00010 * PURPOSE:
00011 * This file redefines dedicated IAR AVR
00012 * keywords in order to ensure that any source file can be processed by
00013 * these compilers.
00014 *****************************************************************************/
00015 
00016 #ifndef _COMPILER_H_
00017 #define _COMPILER_H_
00018 
00019 /*_____ I N C L U D E S ____________________________________________________*/
00020 
00021 
00022 /*_____ D E C L A R A T I O N S ____________________________________________*/
00023 #define LITTLE_ENDIAN
00024 
00025 #ifndef ASM_INCLUDE // define ASM_INCLUDE in your a51 source code before include of .h file
00026 typedef float               Float16;
00027 
00028 typedef unsigned char       U8 ;
00029 typedef unsigned short      U16;
00030 typedef unsigned long       U32;
00031 typedef signed char         S8 ;
00032 typedef short               S16;
00033 typedef long                S32;
00034 #if (defined __C51__)
00035 typedef bit                 Bool;    // Shall be used with _MEM_TYPE_BIT_ to optimize the memory.
00036 #else
00037 typedef unsigned char       Bool;
00038 #endif
00039 
00040 typedef U8                  Status;
00041 typedef Bool                Status_bool;
00042 #define PASS 0
00043 #define FAIL 1
00044 
00045 
00046 
00047 #if (defined __C51__)
00048 #  define _MEM_TYPE_BIT_              bdata  // Used for bit accesses
00049 #  define _MEM_TYPE_FAST_              data
00050 #  define _MEM_TYPE_MEDFAST_          idata
00051 #  define _MEM_TYPE_MEDSLOW_          pdata
00052 #  define _MEM_TYPE_SLOW_             xdata
00053 #else
00054 #  define _MEM_TYPE_BIT_
00055 #  define _MEM_TYPE_FAST_
00056 #  define _MEM_TYPE_MEDFAST_
00057 #  define _MEM_TYPE_MEDSLOW_
00058 #  define _MEM_TYPE_SLOW_
00059 #endif
00060 
00061 typedef unsigned char       Uchar;
00062 
00063 
00064 typedef unsigned char       Uint8;
00065 typedef unsigned int        Uint16;
00066 typedef unsigned long int   Uint32;
00067 
00068 typedef char                Int8;
00069 typedef int                 Int16;
00070 typedef long int            Int32;
00071 
00072 typedef unsigned char       Byte;
00073 typedef unsigned int        Word;
00074 typedef unsigned long int   DWord;
00075 
00076 typedef union
00077 {
00078   Uint32 dw; // l changed in dw (double word) because l is used for signed long...
00079   Uint16 w[2];
00080   Uint8  b[4];
00081 } Union32;
00082 
00083 typedef union
00084 {
00085   Uint16 w;
00086   Uint8  b[2];
00087 } Union16;
00088 
00089 #ifdef __IAR_SYSTEMS_ICC__
00090 typedef char     bit;
00091 typedef int      p_uart_ptchar;
00092 typedef int      r_uart_ptchar;
00093 #endif
00094 #ifdef __CODEVISIONAVR__
00095 typedef char     bit;
00096 typedef int      p_uart_ptchar;
00097 typedef char     r_uart_ptchar;
00098 #endif
00099 #if !defined(__IAR_SYSTEMS_ICC__) && !defined(___ICC__)
00100 typedef char      p_uart_ptchar;
00101 typedef char      r_uart_ptchar;
00102 #endif
00103 
00104 #endif
00105 
00106 /**********************************************************************************/
00107 /* codevision COMPILER (__CODEVISIONAVR__)                                                 */
00108 /**********************************************************************************/
00109 #ifdef __ICC__
00110 #define _ConstType_ lit
00111 #define _MemType_
00112 #define _GenericType_ __generic
00113 #define code lit
00114 #define xdata
00115 #define idata
00116 #define data
00117 #endif
00118 /**********************************************************************************/
00119 /* IAR COMPILER (__IAR_SYSTEMS_ICC__)                                             */
00120 /**********************************************************************************/
00121 #ifdef __IAR_SYSTEMS_ICC__
00122 #include "inavr.h"
00123 #define _ConstType_ __flash
00124 #define _MemType_
00125 #define _GenericType_ __generic
00126 #define code __flash
00127 #define xdata
00128 #define idata
00129 #define data
00130 #define At(x) @ x
00131 #define pdata
00132 #define bdata
00133 
00134 #define Enable_interrupt() __enable_interrupt()
00135 #define Disable_interrupt() __disable_interrupt()
00136 #endif
00137 
00138 
00139 /* General purpose defines */
00140 /*#define _ConstType_   __farflash
00141 #define _MemType_
00142 #define _GenericType_ __generic
00143 #define code __farflash
00144 #define xdata
00145 #define idata
00146 #define data*/
00147 
00148 
00149 
00150 
00151 /*_____ M A C R O S ________________________________________________________*/
00152 /* little-big endian management */
00153 #define INTEL_ALIGNMENT     LITTLE_ENDIAN
00154 #define MOTOROLA_ALIGNMENT  BIG_ENDIAN
00155 
00156 // U16/U32 endian handlers
00157 #ifdef LITTLE_ENDIAN     // => 16bit: (LSB,MSB), 32bit: (LSW,MSW) or (LSB0,LSB1,LSB2,LSB3) or (MSB3,MSB2,MSB1,MSB0)
00158 #  define MSB(u16)        (((U8* )&u16)[1])
00159 #  define LSB(u16)        (((U8* )&u16)[0])
00160 #  define MSW(u32)        (((U16*)&u32)[1])
00161 #  define LSW(u32)        (((U16*)&u32)[0])
00162 #  define MSB0(u32)       (((U8* )&u32)[3])
00163 #  define MSB1(u32)       (((U8* )&u32)[2])
00164 #  define MSB2(u32)       (((U8* )&u32)[1])
00165 #  define MSB3(u32)       (((U8* )&u32)[0])
00166 #  define LSB0(u32)       MSB3(u32)
00167 #  define LSB1(u32)       MSB2(u32)
00168 #  define LSB2(u32)       MSB1(u32)
00169 #  define LSB3(u32)       MSB0(u32)
00170 #else // BIG_ENDIAN         => 16bit: (MSB,LSB), 32bit: (MSW,LSW) or (LSB3,LSB2,LSB1,LSB0) or (MSB0,MSB1,MSB2,MSB3)
00171 #  define MSB(u16)        (((U8* )&u16)[0])
00172 #  define LSB(u16)        (((U8* )&u16)[1])
00173 #  define MSW(u32)        (((U16*)&u32)[0])
00174 #  define LSW(u32)        (((U16*)&u32)[1])
00175 #  define MSB0(u32)       (((U8* )&u32)[0])
00176 #  define MSB1(u32)       (((U8* )&u32)[1])
00177 #  define MSB2(u32)       (((U8* )&u32)[2])
00178 #  define MSB3(u32)       (((U8* )&u32)[3])
00179 #  define LSB0(u32)       MSB3(u32)
00180 #  define LSB1(u32)       MSB2(u32)
00181 #  define LSB2(u32)       MSB1(u32)
00182 #  define LSB3(u32)       MSB0(u32)
00183 #endif
00184 
00185 // Endian converters
00186 #define Le16(b)                        \
00187    (  ((U16)(     (b) &   0xFF) << 8)  \
00188    |  (     ((U16)(b) & 0xFF00) >> 8)  \
00189    )
00190 #define Le32(b)                             \
00191    (  ((U32)(     (b) &       0xFF) << 24)  \
00192    |  ((U32)((U16)(b) &     0xFF00) <<  8)  \
00193    |  (     ((U32)(b) &   0xFF0000) >>  8)  \
00194    |  (     ((U32)(b) & 0xFF000000) >> 24)  \
00195    )
00196 
00197 // host to network conversion: used for Intel HEX format, TCP/IP, ...
00198 // Convert a 16-bit value from host-byte order to network-byte order
00199 // Standard Unix, POSIX 1003.1g (draft)
00200 
00201 #ifdef LITTLE_ENDIAN
00202 #  define htons(a)    Le16(a)
00203 #define ntohs(a)    htons(a)
00204 #  define htonl(a)    Le32(a)
00205 #define ntohl(a)    htonl(a)
00206 #else
00207 #define htons(a)    (a)
00208 #define ntohs(a)    (a)
00209 #define htonl(a)    (a)
00210 #define ntohl(a)    (a)
00211 #endif
00212 
00213 
00214 // Constants
00215 #define ENABLE   1
00216 #define ENABLED  1
00217 #define DISABLED 0
00218 #define DISABLE  0
00219 #define FALSE   (0==1)
00220 #define TRUE    (1==1)
00221 
00222 #define KO      0
00223 #define OK      1
00224 #define OFF     0
00225 #define ON      1
00226 #define NULL    0
00227 #ifndef ASM_INCLUDE // define ASM_INCLUDE in your a51 source code before include of .h file
00228 #define CLR     0
00229 #define SET     1
00230 #endif
00231 
00232 /* Bit and bytes manipulations */
00233 #define LOW(U16)                ((Uchar)U16)
00234 #define HIGH(U16)               ((Uchar)(U16>>8))
00235 #define TST_BIT_X(addrx,mask)   (*addrx & mask)
00236 #define SET_BIT_X(addrx,mask)   (*addrx = (*addrx | mask))
00237 #define CLR_BIT_X(addrx,mask)   (*addrx = (*addrx & ~mask))
00238 #define OUT_X(addrx,value)      (*addrx = value)
00239 #define IN_X(addrx)             (*addrx)
00240 
00241 /*M**************************************************************************
00242 * NAME: Long_call
00243 *----------------------------------------------------------------------------
00244 * PARAMS:
00245 * addr: address of the routine to call
00246 *----------------------------------------------------------------------------
00247 * PURPOSE:
00248 * Call the routine at address addr: generate an Assembly LCALL addr opcode.
00249 *----------------------------------------------------------------------------
00250 * EXAMPLE:
00251 * Long_call(0); // Software reset (if no IT used before)
00252 *----------------------------------------------------------------------------
00253 * NOTE:
00254 * May be used as a long jump opcode in some special cases
00255 *****************************************************************************/
00256 #define Long_call(addr)         ((*(void (_ConstType_*)(void))(addr))())
00257 
00258 /* {For Langdoc} */
00259 
00260 /***********************************************************
00261  SET_SFR_BIT macro
00262   parameters
00263     sfr_reg : defined value in include file for sfr register
00264     bit_pos : defined value B_XX in include file for particular
00265               bit of sfr register
00266     bit_val : CLR / SET
00267 ************************************************************/
00268 #define SET_SFR_BIT(sfr_reg, bit_pos, bit_val) { sfr_reg &= ~(1<<(bit_pos)); sfr_reg |= ((bit_val)<<(bit_pos));}
00269 
00270 /***********************************************************
00271  bit_is_clear macro
00272   parameters
00273     PORT     : defined value in include file for sfr register
00274     POSITION : defined value in include file for particular
00275               bit of sfr register
00276   example : if (bit_is_clear(PORTB,PORTB3)) ...
00277 ************************************************************/
00278 #define bit_is_clear(PORT,POSITION) ((PORT & (1<<POSITION)) == 0 )
00279 
00280 /***********************************************************
00281  bit_is_set macro
00282   parameters
00283     PORT     : defined value in include file for sfr register
00284     POSITION : defined value in include file for particular
00285               bit of sfr register
00286   example : if (bit_is_set(PORTB,PORTB3)) ...
00287 ************************************************************/
00288 #define bit_is_set(PORT,POSITION) ((PORT & (1<<POSITION)) != 0 )
00289 
00290 
00291 
00292 /******************************************************************************/
00293 /* IAR COMPILER                                                               */
00294 /******************************************************************************/
00295 
00296 #define __IOMACRO_H
00297 
00298 #define TID_GUARD(proc) ((__TID__ & 0x7FF0) != ((90 << 8) | ((proc) << 4)))
00299 
00300 
00301 /*----------------------------------------------------------------------------*/
00302 #ifdef __IAR_SYSTEMS_ASM__
00303 /*----------------------------------------------------------------------------*/
00304 
00305 /* Byte sized SFRs */
00306 #define SFR_B_BITS(_NAME,_ADDR,_A,_B,_C,_D,_E,_F,_G,_H)\
00307     sfrb    _NAME = _ADDR
00308 #define SFR_B_BITS_EXT(_NAME,_ADDR,_A,_B,_C,_D,_E,_F,_G,_H)\
00309     sfrb    _NAME = _ADDR
00310 #define SFR_B2_BITS(_NAME1,_NAME2,_ADDR,_A,_B,_C,_D,_E,_F,_G,_H)\
00311     ASMSFRB2 _NAME1, _NAME2, _ADDR
00312 
00313 ASMSFRB2 MACRO
00314     sfrb    \1 = \3
00315     sfrb    \2 = \3
00316     ENDM
00317 
00318 
00319 /* Word sized SFRs, needs to be expanded into an assembler macro first. */
00320 #define SFR_W_BITS(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H, _I,_J,_K,_L,_M,_N,_O,_P)\
00321     ASMSFRW _NAME, _ADDR
00322 
00323 #define SFR_W_BITS_EXT(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H, _I,_J,_K,_L,_M,_N,_O,_P)\
00324     ASMSFRW _NAME, _ADDR
00325 
00326 ASMSFRW MACRO
00327     sfrw    \1  = \2
00328     sfrb    \1L = (\2+0)
00329     sfrb    \1H = (\2+1)
00330     ENDM
00331 
00332 #endif /* __IAR_SYSTEMS_ASM__ */
00333 
00334 /*----------------------------------------------------------------------------*/
00335 #ifdef __ICCAVR__
00336 /*----------------------------------------------------------------------------*/
00337 #define __BYTEBITS(_NAME,_A,_B,_C,_D,_E,_F,_G,_H) \
00338 unsigned char _NAME ## _ ## _A:1, \
00339               _NAME ## _ ## _B:1, \
00340               _NAME ## _ ## _C:1, \
00341               _NAME ## _ ## _D:1, \
00342               _NAME ## _ ## _E:1, \
00343               _NAME ## _ ## _F:1, \
00344               _NAME ## _ ## _G:1, \
00345               _NAME ## _ ## _H:1;
00346 
00347 #define SFR_B_BITS(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H) \
00348     __io union { \
00349       unsigned char   _NAME;           /* The sfrb as 1 byte */ \
00350       struct {                        /* The sfrb as 8 bits */ \
00351         __BYTEBITS(_NAME, _A,_B,_C,_D,_E,_F,_G,_H) \
00352       };  \
00353     } @ _ADDR;
00354 #define SFR_B2_BITS(_NAME1, _NAME2, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H) \
00355     __io union { \
00356       unsigned char   _NAME1;           /* The sfrb as 1 byte */ \
00357       unsigned char   _NAME2;           /* The sfrb as 1 byte */ \
00358       struct {                        /* The sfrb as 8 bits */ \
00359         __BYTEBITS(_NAME1, _A,_B,_C,_D,_E,_F,_G,_H) \
00360       };  \
00361       struct {                        /* The sfrb as 8 bits */ \
00362         __BYTEBITS(_NAME2, _A,_B,_C,_D,_E,_F,_G,_H) \
00363       };  \
00364     } @ _ADDR;
00365 #define SFR_B_BITS_EXT(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H) \
00366     __tiny __no_init volatile union { \
00367       unsigned char   _NAME;           /* The sfrb as 1 byte */ \
00368       struct {                        /* The sfrb as 8 bits */ \
00369         __BYTEBITS(_NAME, _A,_B,_C,_D,_E,_F,_G,_H) \
00370       };  \
00371     } @ _ADDR;
00372 
00373 #define SFR_W_BITS(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H, _I,_J,_K,_L,_M,_N,_O,_P) \
00374     __io union { \
00375       unsigned short  _NAME;  /* The sfrw as 1 short */ \
00376       struct {                /* The sfrw as 16 bits */ \
00377         __BYTEBITS(_NAME, _A,_B,_C,_D,_E,_F,_G,_H)   /* Bit names defined by user */  \
00378         __BYTEBITS(_NAME, _I,_J,_K,_L,_M,_N,_O,_P)   /* Bit names defined by user */  \
00379       };  \
00380       struct { /* The sfrw as 2 bytes */ \
00381         unsigned char _NAME ## L; \
00382         unsigned char _NAME ## H; \
00383       };  \
00384       struct {                          /* The sfrw as 2 x 8 bits */ \
00385         __BYTEBITS(_NAME ## L, Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)  /* Bit names hard coded to 0-7 */ \
00386         __BYTEBITS(_NAME ## H, Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)  /* Bit names hard coded to 0-7 */ \
00387       };  \
00388     } @ _ADDR;
00389 
00390 #define SFR_W_BITS_EXT(_NAME, _ADDR, _A,_B,_C,_D,_E,_F,_G,_H, _I,_J,_K,_L,_M,_N,_O,_P) \
00391    __io union { \
00392     unsigned short  _NAME;   \
00393      struct {                /* The sfrw_ext as 16 bits */ \
00394         __BYTEBITS(_NAME, _A,_B,_C,_D,_E,_F,_G,_H)   /* Bit names defined by user */  \
00395         __BYTEBITS(_NAME, _I,_J,_K,_L,_M,_N,_O,_P)   /* Bit names defined by user */  \
00396       };  \
00397       struct { /* The sfrw _ext as 2 bytes */ \
00398         unsigned char _NAME ## L; \
00399         unsigned char _NAME ## H; \
00400       };  \
00401       struct {                          /* The sfrw_ext as 2 x 8 bits */ \
00402         __BYTEBITS(_NAME ## L, Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)  /* Bit names hard coded to 0-7 */ \
00403         __BYTEBITS(_NAME ## H, Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)  /* Bit names hard coded to 0-7 */ \
00404       };  \
00405     } @ _ADDR;
00406 
00407 #endif
00408 
00409 #define SFR_B(_NAME, _ADDR) SFR_B_BITS(_NAME, _ADDR, \
00410                                     Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)
00411 #define SFR_B2(_NAME1, _NAME2, _ADDR) SFR_B2_BITS(_NAME1, _NAME2, _ADDR, \
00412                                     Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)
00413 #define SFR_B_EXT(_NAME, _ADDR) SFR_B_BITS_EXT(_NAME, _ADDR, \
00414                                     Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7)
00415 
00416 #define SFR_W(_NAME, _ADDR)  SFR_W_BITS(_NAME, _ADDR, \
00417                                     Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7, \
00418                                     Bit8,Bit9,Bit10,Bit11,Bit12,Bit13,Bit14,Bit15)
00419 
00420 #define SFR_W_EXT(_NAME, _ADDR)  SFR_W_BITS_EXT(_NAME, _ADDR, \
00421                                     Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7, \
00422                                     Bit8,Bit9,Bit10,Bit11,Bit12,Bit13,Bit14,Bit15)
00423 
00424 #endif /* _COMPILER_H_ */
00425 

Generated on Wed Jul 12 16:55:10 2006 for Atmel BLDC Sensorless on ATAVRMC100 by  doxygen 1.4.7