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00011 #ifndef _MC_DRV_H_
00012 #define _MC_DRV_H_
00013
00014
00015 #define output_disconnected 0x01
00016
00017
00018 #define Set_timer_data_register_to_zero() (TCNT0=0x00)
00019
00020
00021 #define PSC_ONE_RAMP (0<<PMODE01)|(0<<PMODE00)
00022 #define PSC_TWO_RAMP (0<<PMODE01)|(1<<PMODE00)
00023 #define PSC_FOUR_RAMP (1<<PMODE01)|(0<<PMODE00)
00024 #define PSC_CENTERED (1<<PMODE01)|(1<<PMODE00)
00025
00026 #define RAMP_MODE_NUMBER PSC_ONE_RAMP
00027
00028 #define SET_PLOCK (1<<PLOCK0)
00029 #define RELEASE_PLOCK (0<<PLOCK0)
00030
00031 #define PRESC_NODIV (0<<PPRE01)|(0<<PPRE00)
00032 #define PRESC_DIV_BY_4 (0<<PPRE01)|(1<<PPRE00)
00033 #define PRESC_DIV_BY_16 (1<<PPRE01)|(0<<PPRE00)
00034 #define PRESC_DIV_BY_64 (1<<PPRE01)|(1<<PPRE00)
00035
00036 #define OUTPUT_ACTIVE_HIGH (1<<POP0)
00037 #define OUTPUT_ACTIVE_LOW (0<<POP0)
00038
00039
00040 #define HALL_A() (ANACOMP_0_vect)
00041 #define HALL_B() (ANACOMP_1_vect)
00042 #define HALL_C() (ANACOMP_2_vect)
00043
00044 #ifdef USE_INTERNAL_COMPARATORS
00045
00046 #define HALL_SENSOR_VALUE() (ACSR & 0x07)
00047 #else
00048
00049 #define HALL_SENSOR_VALUE() \
00050 ( (PIND & (1<<PIND7)) >> PIND7 ) \
00051 | ( (PINC & (1<<PINC6)) >> 5 ) \
00052 | ( (PIND & (1<<PIND5)) >> 3 )
00053 #endif
00054
00055 #define MIN_DELAY 2
00056 #define MAX_DELAY 40
00057 #define FILTER_DELAY 4
00058 #define MASK_DEMAG 2
00059
00060 #define Clear_Port_Q1() (PORTB &= ( ~(1<<PORTB0)))
00061 #define Clear_Port_Q3() (PORTC &= ( ~(1<<PORTC0)))
00062 #define Clear_Port_Q5() (PORTD &= ( ~(1<<PORTD0)))
00063 #define Clear_Port_Q2() (PORTB &= ( ~(1<<PORTB1)))
00064 #define Clear_Port_Q4() (PORTB &= ( ~(1<<PORTB6)))
00065 #define Clear_Port_Q6() (PORTB &= ( ~(1<<PORTB7)))
00066 #define Set_Port_Q2() (PORTB |= (1<<PORTB1))
00067 #define Set_Port_Q4() (PORTB |= (1<<PORTB6))
00068 #define Set_Port_Q6() (PORTB |= (1<<PORTB7))
00069
00070
00071 #define Set_none() \
00072 PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
00073 PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
00074 PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
00075 Clear_Port_Q2(); \
00076 Clear_Port_Q4(); \
00077 Clear_Port_Q6(); \
00078 Clear_Port_Q1(); \
00079 Clear_Port_Q3(); \
00080 Clear_Port_Q5();
00081
00082 #define Set_Q1Q4() \
00083 PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
00084 PSOC1 = (0<<POEN1A)|(1<<POEN1B);\
00085 PSOC2 = (1<<POEN2A)|(0<<POEN2B);
00086
00087 #define Set_Q1Q6() \
00088 PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
00089 PSOC0 = (0<<POEN0A)|(1<<POEN0B);\
00090 PSOC2 = (1<<POEN2A)|(0<<POEN2B);
00091
00092 #define Set_Q3Q2() \
00093 PSOC0 = (0<<POEN0A)|(0<<POEN0B);\
00094 PSOC1 = (1<<POEN1A)|(0<<POEN1B);\
00095 PSOC2 = (0<<POEN2A)|(1<<POEN2B);
00096
00097 #define Set_Q3Q6() \
00098 PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
00099 PSOC0 = (0<<POEN0A)|(1<<POEN0B);\
00100 PSOC1 = (1<<POEN1A)|(0<<POEN1B);
00101
00102 #define Set_Q5Q2() \
00103 PSOC1 = (0<<POEN1A)|(0<<POEN1B);\
00104 PSOC0 = (1<<POEN0A)|(0<<POEN0B);\
00105 PSOC2 = (0<<POEN2A)|(1<<POEN2B);
00106
00107 #define Set_Q5Q4() \
00108 PSOC2 = (0<<POEN2A)|(0<<POEN2B);\
00109 PSOC0 = (1<<POEN0A)|(0<<POEN0B);\
00110 PSOC1 = (0<<POEN1A)|(1<<POEN1B);
00111
00112
00113 #define switch_ON_LED() (PORTE &= ~(1<<PE2))
00114 #define switch_OFF_LED() (PORTE |= (1<<PE2))
00115
00116
00117 #define Set_EXT1() (PORTB |= (1<<PB3)) // EXT1
00118 #define Clear_EXT1() (PORTB &= ~(1<<PB3))
00119 #define Set_EXT2() (PORTB |= (1<<PB4)) // EXT2
00120 #define Clear_EXT2() (PORTB &= ~(1<<PB4))
00121
00122
00123 #define Set_EXT4() (PORTC |= (1<<PC2)) // EXT4
00124 #define Clear_EXT4() (PORTC &= ~(1<<PC2))
00125 #define Set_EXT5() (PORTB |= (1<<PB5)) // EXT5
00126 #define Clear_EXT5() (PORTB &= ~(1<<PB5))
00127 #define Set_EXT6() (PORTE |= (1<<PE1)) // EXT6
00128 #define Clear_EXT6() (PORTE &= ~(1<<PE1))
00129 #define Toggle_EXT6() (PINE |= (1<<PINE1))
00130 #define Set_EXT7() (PORTD |= (1<<PD3)) // EXT7
00131 #define Clear_EXT7() (PORTD &= ~(1<<PD3))
00132 #define Set_EXT8() (PORTD |= (1<<PD4)) // EXT8
00133 #define Clear_EXT8() (PORTD &= ~(1<<PD4))
00134 #define Set_EXT9() (PORTE |= (1<<PE0)) // EXT9
00135 #define Clear_EXT9() (PORTE &= ~(1<<PE0))
00136 #define Toggle_EXT9() (PINE |= (1<<PINE0))
00137 #define Set_EXT10() (PORTD |= (1<<PD2)) // EXT10
00138 #define Clear_EXT10() (PORTD &= ~(1<<PD2))
00139
00140 #define Get_EXT1() ((PINB & (1<<PB3))>>PB3) // EXT1
00141 #define Get_EXT2() ((PINB & (1<<PB4))>>PB4) // EXT2
00142 #define Get_EXT3() ((PINC & (1<<PC1))>>PC1) // EXT3
00143 #define Get_EXT4() ((PINC & (1<<PC2))>>PC2) // EXT4
00144 #define Get_EXT5() ((PINB & (1<<PB5))>>PB5) // EXT5
00145 #define Get_EXT6() ((PINE & (1<<PE1))>>PE1) // EXT6
00146 #define Get_EXT7() ((PIND & (1<<PD3))>>PD3) // EXT7
00147 #define Get_EXT8() ((PIND & (1<<PD4))>>PD4) // EXT8
00148 #define Get_EXT9() ((PINE & (1<<PE0))>>PE0) // EXT9
00149 #define Get_EXT10() ((PIND & (1<<PD2))>>PD2) // EXT10
00150
00151
00152 #define CONV_INIT 0
00153 #define CONV_POT 1
00154 #define CONV_CURRENT 2
00155
00156 #define FREE 0
00157 #define BUSY 1
00158
00159
00160
00161
00162
00163 void mc_init_port(void);
00164 void mc_init_pwm(void);
00165 void mc_init_IT(void);
00166 void PSC0_Init (unsigned int OCRnRB,
00167 unsigned int OCRnSB,
00168 unsigned int OCRnRA,
00169 unsigned int OCRnSA);
00170
00171 void PSC1_Init (unsigned int OCRnRB,
00172 unsigned int OCRnSB,
00173 unsigned int OCRnRA,
00174 unsigned int OCRnSA);
00175
00176 void PSC2_Init (unsigned int OCRnRB,
00177 unsigned int OCRnSB,
00178 unsigned int OCRnRA,
00179 unsigned int OCRnSA);
00180
00181
00182 U8 mc_get_hall(void);
00183 void mc_duty_cycle(U8 level);
00184 void mc_switch_commutation(U8 position);
00185
00186
00187 void mc_config_sampling_period(void);
00188
00189
00190 void mc_config_time_estimation_speed(void);
00191 void mc_estimation_speed(void);
00192
00193
00194 void mc_ADC_Scheduler(void);
00195 U8 mc_Get_Current(void);
00196 U8 mc_Get_Potentiometer(void);
00197
00198
00199 void mc_set_Over_Current(U8 Level);
00200
00201
00202 S32 mc_get_Num_Turn(void);
00203 void mc_reset_Num_Turn(void);
00204
00205 void PSC_Stop(void);
00206 void PSC_Run(void);
00207
00208
00209 #endif