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00012 #ifndef _ADC_H_
00013 #define _ADC_H_
00014
00015
00016
00017 #define AMP_GAIN_5 0
00018 #define AMP_GAIN_10 1
00019 #define AMP_GAIN_20 2
00020 #define AMP_GAIN_40 3
00021
00022 #define AMP_AUTO_SYNC 0
00023 #define AMP_TRIG_ON_PSC0 1
00024 #define AMP_TRIG_ON_PSC1 2
00025 #define AMP_TRIG_ON_PSC2 3
00026
00027
00028 #define ADC_INPUT_ADC0 0
00029 #define ADC_INPUT_ADC1 1
00030 #define ADC_INPUT_ADC2 2
00031 #define ADC_INPUT_ADC3 3
00032 #define ADC_INPUT_ADC4 4
00033 #define ADC_INPUT_ADC5 5
00034 #define ADC_INPUT_ADC6 6
00035 #define ADC_INPUT_ADC7 7
00036 #define ADC_INPUT_ADC8 8
00037 #define ADC_INPUT_ADC9 9
00038 #define ADC_INPUT_ADC10 10
00039 #define ADC_INPUT_AMP0 11
00040 #define ADC_INPUT_AMP1 12
00041 #define ADC_INPUT_BANDGAP 14
00042
00043 #define ADC_VREF_AREF 0
00044 #define ADC_VREF_AVCC 1
00045 #define ADC_VREF_INTERNAL 3
00046
00047 #define ADC_TRIG_SRC_FREE_RUNNING 0
00048 #define ADC_TRIG_SRC_ANA_COMP0 1
00049 #define ADC_TRIG_SRC_EXT_IT_0 2
00050 #define ADC_TRIG_SRC_TIM0_COMP_MATCH 3
00051 #define ADC_TRIG_SRC_TIM0_COMP_OVF 4
00052 #define ADC_TRIG_SRC_TIM1_COMP_MATCH 5
00053 #define ADC_TRIG_SRC_TIM1_COMP_OVF 6
00054 #define ADC_TRIG_SRC_TIM1_CAPTURE 7
00055 #define ADC_TRIG_SRC_PSC0 8
00056 #define ADC_TRIG_SRC_PSC1 9
00057 #define ADC_TRIG_SRC_PSC2 10
00058 #define ADC_TRIG_SRC_ANA_COMP1 11
00059 #define ADC_TRIG_SRC_ANA_COMP2 12
00060
00061 #define ADC_PRESCALER_2 0
00062 #define ADC_PRESCALER_2b 1
00063 #define ADC_PRESCALER_4 2
00064 #define ADC_PRESCALER_8 3
00065 #define ADC_PRESCALER_16 4
00066 #define ADC_PRESCALER_32 5
00067 #define ADC_PRESCALER_64 6
00068 #define ADC_PRESCALER_128 7
00069
00070 #endif