Remote Access Control


config.h

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00001 // This file has been prepared for Doxygen automatic documentation generation.
00050 #ifndef CONFIG_H
00051 #define CONFIG_H
00052 
00053 
00054 
00055 //#define RF_CARRIER 315 //!< Use 315.0 MHz RF carrier.
00056 #define RF_CARRIER 433 
00057 //#define RF_CARRIER 868 
00058 //#define RF_CARRIER 915 
00059 
00060 
00061 
00063 #define CPU_F 8000000
00064 
00066 //#define DONT_ERASE_TRANSMITTERS
00067 
00068 #define ASK 
00069 //#define FSK 
00070 
00072 #define INVERTED_MANCHESTER
00074 //#define USE_UART
00075 
00076 #define KEY_BITS 128 
00077 //#define KEY_BITS 192 
00078 //#define KEY_BITS 256 
00079 
00081 #define SERIAL_NO_BYTES 4
00082 
00084 #define COMMAND_CODE_BYTES 1
00085 
00087 #define SEQ_COUNTER_BYTES 4
00088 
00090 #define MAC_BYTES 4
00091 
00093 #define MAX_TRANSMITTERS 5
00094 
00096 #define WINDOW_SIZE 100
00097 
00099 #define MAX_WATCHDOG_RESETS 3
00100 
00101 // Long timeout delay = HI * 8.39 s + LO * 0.128 ms @ MHz
00102 
00104 #define LONG_TIMEOUT_HI_VALUE 1
00106 #define LONG_TIMEOUT_LO_VALUE 12578
00107 
00108 
00109 
00111 #define LEARN_MODE_PCINT_VECT PCINT2_vect
00113 #define LEARN_MODE_PCINT_ENABLE_BIT PCIE2
00115 #define LEARN_MODE_PCINT_MASK_REG PCMSK2
00117 #define LEARN_MODE_PCINT_MASK_BIT PCINT21
00119 #define LEARN_MODE_INPUT_DDR DDRD
00121 #define LEARN_MODE_INPUT_REG PIND
00123 #define LEARN_MODE_INPUT_PULLUP_REG PORTD
00125 #define LEARN_MODE_INPUT_BIT PD5
00127 #define LEARN_MODE_OUTPUT_DDR DDRC
00129 #define LEARN_MODE_OUTPUT_REG PORTC
00131 #define LEARN_MODE_OUTPUT_BIT PC5
00133 #define LEARN_MODE_OUTPUT_HIGH() LEARN_MODE_OUTPUT_REG |= (1<<LEARN_MODE_OUTPUT_BIT);
00135 #define LEARN_MODE_OUTPUT_LOW() LEARN_MODE_OUTPUT_REG &= ~(1<<LEARN_MODE_OUTPUT_BIT);
00136 
00138 #define POLY 0x8005 // CRC-16
00139 //#define POLY 0x1021 // CRC-CCITT
00140 
00141 
00142 
00143 /* --- Calculated parameters follow, do not change --- */
00144 
00145 // Calc RF receiver configuration parameters.
00146 // Consult receiver datasheet for LIM values.
00147 #if RF_CARRIER == 315
00148   #define RX_XTAL_HZ 4906250
00149   #define RX_PRESCALE 10
00150   #define RX_LIM_MIN 20
00151   #define RX_LIM_MAX 32
00152 #elif RF_CARRIER == 433
00153   #define RX_XTAL_HZ 6764380
00154   #define RX_PRESCALE 14
00155   #define RX_LIM_MIN 20
00156   #define RX_LIM_MAX 31
00157 #elif RF_CARRIER == 868
00158   #define RX_XTAL_HZ 6776170
00159   #define RX_PRESCALE 14
00160   #define RX_LIM_MIN 20
00161   #define RX_LIM_MAX 31
00162 #elif RF_CARRIER == 915
00163   #define RX_XTAL_HZ 7140630
00164   #define RX_PRESCALE 14
00165   #define RX_LIM_MIN 21
00166   #define RX_LIM_MAX 33
00167 #else
00168   #error RF carrier must be 315, 433, 868 or 915!
00169 #endif
00170 
00171 
00172 
00174 #define BLOCK_SIZE 16
00176 #define CMAC_SUBKEY_SIZE BLOCK_SIZE
00177 
00178 // Calculate some info based on key bit count.
00179 #if KEY_BITS == 128
00180   #define ROUNDS 10 
00181   #define KEY_SIZE 16 
00182   #define SCHEDULE_BLOCK_REPETITIONS 1 // Number of blocks/rounds in the schedule buffer.
00183   #define SCHEDULE_KEY_REPETITIONS 1 // Number of keys that fits in the schedule buffer.
00184   #define LAST_ROUND_CONSTANT 0x6C // Round constant taken from last encryption round.
00185 #elif KEY_BITS == 192
00186   #define ROUNDS 12 
00187   #define KEY_SIZE 24 
00188   #define SCHEDULE_BLOCK_REPETITIONS 3 // Number of blocks/rounds in the schedule buffer.
00189   #define SCHEDULE_KEY_REPETITIONS 2 // Number of keys that fits in the schedule buffer.
00190   #define LAST_ROUND_CONSTANT 0x36 // Round constant taken from last encryption round.
00191 #elif KEY_BITS == 256
00192   #define ROUNDS 14 
00193   #define KEY_SIZE 32 
00194   #define SCHEDULE_BLOCK_REPETITIONS 2 // Number of blocks/rounds in the schedule buffer.
00195   #define SCHEDULE_KEY_REPETITIONS 1 // Number of keys that fits in the schedule buffer.
00196   #define LAST_ROUND_CONSTANT 0x80 // Round constant taken from last encryption round.
00197 #else
00198   #error Key must be 128, 192 or 256 bits!
00199 #endif
00200 
00202 #define SCHEDULE_BUFFER_SIZE (BLOCK_SIZE*SCHEDULE_BLOCK_REPETITIONS)
00203 
00205 #define MESSAGE_SIZE_WO_MAC (SERIAL_NO_BYTES+COMMAND_CODE_BYTES+SERIAL_NO_BYTES)
00206 
00207 // Check that message payload does not exceed AES block size.
00208 #if MESSAGE_SIZE_WO_MAC > BLOCK_SIZE
00209   #error Message payload exceeds AES block size.
00210 #endif
00211 
00213 #define MESSAGE_SIZE_W_MAC (MESSAGE_SIZE_WO_MAC+MAC_BYTES)
00214 
00215 // Prepare type and max value for serial number.
00216 #if SERIAL_NO_BYTES == 1
00217   #define SERIAL_NO_TYPE uint8_t
00218   #define SERIAL_NO_MAX 0xff
00219 #elif SERIAL_NO_BYTES == 2
00220   #define SERIAL_NO_TYPE uint16_t
00221   #define SERIAL_NO_MAX 0xffff
00222 #elif SERIAL_NO_BYTES == 4
00223   #define SERIAL_NO_TYPE uint32_t
00224   #define SERIAL_NO_MAX 0xffffffff
00225 #else
00226   #error Invalid serial number size, must be 1, 2 or 4 bytes.
00227 #endif
00228 
00229 // Prepare type and max value for command code.
00230 #if COMMAND_CODE_BYTES == 1
00231   #define COMMAND_CODE_TYPE uint8_t
00232   #define COMMAND_CODE_MAX 0xff
00233 #elif COMMAND_CODE_BYTES == 2
00234   #define COMMAND_CODE_TYPE uint16_t
00235   #define COMMAND_CODE_MAX 0xffff
00236 #elif COMMAND_CODE_BYTES == 4
00237   #define COMMAND_CODE_TYPE uint32_t
00238   #define COMMAND_CODE_MAX 0xffffffff
00239 #else
00240   #error Invalid command code size, must be 1, 2 or 4 bytes.
00241 #endif
00242 
00243 // Prepare type and max value for sequential counter.
00244 #if SEQ_COUNTER_BYTES == 1
00245   #define SEQ_COUNTER_TYPE uint8_t
00246   #define SEQ_COUNTER_MAX 0xff
00247 #elif SEQ_COUNTER_BYTES == 2
00248   #define SEQ_COUNTER_TYPE uint16_t
00249   #define SEQ_COUNTER_MAX 0xffff
00250 #elif SEQ_COUNTER_BYTES == 4
00251   #define SEQ_COUNTER_TYPE uint32_t
00252   #define SEQ_COUNTER_MAX 0xffffffff
00253 #else
00254   #error Invalid sequential counter size, must be 1, 2 or 4 bytes.
00255 #endif
00256 
00257 
00258 
00259 #endif
@DOC_TITLE@
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