Go to the documentation of this file.00001
00002
00003
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048 #ifndef _GPIO_H_
00049 #define _GPIO_H_
00050
00051 #include <avr32/io.h>
00052 #include "compiler.h"
00053
00056
00057 #define GPIO_SUCCESS 0 //!< Function successfully completed.
00058 #define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range.
00059
00060
00061
00064
00065 #define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change.
00066 #define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge.
00067 #define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge.
00068
00069
00072
00073 #define GPIO_DIR_INPUT (0 << 0) //!< Pin is Input
00074 #define GPIO_DIR_OUTPUT (1 << 0) //!< Pin is Output
00075 #define GPIO_INIT_LOW (0 << 1) //!< Initial Ouptput State is Low
00076 #define GPIO_INIT_HIGH (1 << 1) //!< Initial Ouptput State is High
00077 #define GPIO_PULL_UP (1 << 2) //!< Pull-Up (when input)
00078 #define GPIO_PULL_DOWN (2 << 2) //!< Pull-Down (when input)
00079 #define GPIO_BUSKEEPER (3 << 2) //!< Bus Keeper
00080 #define GPIO_DRIVE_MIN (0 << 4) //!< Drive Min Configuration
00081 #define GPIO_DRIVE_LOW (1 << 4) //!< Drive Low Configuration
00082 #define GPIO_DRIVE_HIGH (2 << 4) //!< Drive High Configuration
00083 #define GPIO_DRIVE_MAX (3 << 4) //!< Drive Max Configuration
00084 #define GPIO_OPEN_DRAIN (1 << 6) //!< Open-Drain (when output)
00085 #define GPIO_INTERRUPT (1 << 7) //!< Enable Pin/Group Interrupt
00086 #define GPIO_BOTHEDGES (3 << 7) //!< Sense Both Edges
00087 #define GPIO_RISING (5 << 7) //!< Sense Risign Edge
00088 #define GPIO_FALLING (7 << 7) //!< Sense Falling Edge
00089
00090
00092 typedef struct
00093 {
00094 unsigned char pin;
00095 unsigned char function;
00096 } gpio_map_t[];
00097
00098
00110
00111
00119 extern int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size);
00120
00136 extern int gpio_enable_module_pin(uint32_t pin, uint32_t function);
00137
00143 extern void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size);
00144
00154 extern void gpio_enable_gpio_pin(uint32_t pin);
00155
00156
00157
00158
00159
00160
00161
00162
00163 #if 0
00164
00169 extern void gpio_enable_pin_open_drain(uint32_t pin);
00170
00175 extern void gpio_disable_pin_open_drain(uint32_t pin);
00176
00177 #endif
00178
00183 extern void gpio_enable_pin_pull_up(uint32_t pin);
00184
00189 extern void gpio_disable_pin_pull_up(uint32_t pin);
00190
00191 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00192
00193
00198 extern void gpio_enable_pin_pull_down(uint32_t pin);
00199
00204 extern void gpio_disable_pin_pull_down(uint32_t pin);
00205
00210 extern void gpio_enable_pin_buskeeper(uint32_t pin);
00211
00216 extern void gpio_disable_pin_buskeeper(uint32_t pin);
00217
00218 #endif
00219
00225 extern void gpio_configure_pin(uint32_t pin, uint32_t flags);
00226
00233 extern void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags);
00234
00241 extern int gpio_get_pin_value(uint32_t pin);
00242
00250 #define gpio_pin_is_low(pin)\
00251 !gpio_get_pin_value(pin)?1:0
00252
00260 #define gpio_pin_is_high(pin) \
00261 gpio_get_pin_value(pin)?1:0
00262
00272 extern int gpio_get_gpio_pin_output_value(uint32_t pin);
00273
00284 extern int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin);
00285
00290 extern void gpio_set_gpio_pin(uint32_t pin);
00291
00298 extern void gpio_set_pin_high(uint32_t pin);
00299
00300
00306 extern void gpio_set_group_high(uint32_t port, uint32_t mask);
00307
00312 extern void gpio_clr_gpio_pin(uint32_t pin);
00313
00320 extern void gpio_set_pin_low(uint32_t pin);
00321
00327 extern void gpio_set_group_low(uint32_t port, uint32_t mask);
00328
00333 extern void gpio_tgl_gpio_pin(uint32_t pin);
00334
00341 extern void gpio_toggle_pin(uint32_t pin);
00342
00348 extern void gpio_toggle_group(uint32_t port, uint32_t mask);
00349
00354 extern void gpio_set_gpio_open_drain_pin(uint32_t pin);
00355
00360 extern void gpio_clr_gpio_open_drain_pin(uint32_t pin);
00361
00366 extern void gpio_tgl_gpio_open_drain_pin(uint32_t pin);
00367
00381 extern void gpio_enable_pin_glitch_filter(uint32_t pin);
00382
00387 extern void gpio_disable_pin_glitch_filter(uint32_t pin);
00388
00397 extern int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode);
00398
00403 extern void gpio_disable_pin_interrupt(uint32_t pin);
00404
00411 extern int gpio_get_pin_interrupt_flag(uint32_t pin);
00412
00417 extern void gpio_clear_pin_interrupt_flag(uint32_t pin);
00418
00420
00421
00422 #if (defined AVR32_GPIO_LOCAL_ADDRESS)
00423
00437
00438
00444 #if (defined __GNUC__)
00445 __attribute__((__always_inline__))
00446 #endif
00447 extern __inline__ void gpio_local_init(void)
00448 {
00449 Set_system_register(AVR32_CPUCR,
00450 Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
00451 }
00452
00462 #if (defined __GNUC__)
00463 __attribute__((__always_inline__))
00464 #endif
00465 extern __inline__ void gpio_local_enable_pin_output_driver(uint32_t pin)
00466 {
00467 AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
00468 }
00469
00476 #if (defined __GNUC__)
00477 __attribute__((__always_inline__))
00478 #endif
00479 extern __inline__ void gpio_local_disable_pin_output_driver(uint32_t pin)
00480 {
00481 AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
00482 }
00483
00492 #if (defined __GNUC__)
00493 __attribute__((__always_inline__))
00494 #endif
00495 extern __inline__ int gpio_local_get_pin_value(uint32_t pin)
00496 {
00497 return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
00498 }
00499
00511 #if (defined __GNUC__)
00512 __attribute__((__always_inline__))
00513 #endif
00514 extern __inline__ void gpio_local_set_gpio_pin(uint32_t pin)
00515 {
00516 AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
00517 }
00518
00530 #if (defined __GNUC__)
00531 __attribute__((__always_inline__))
00532 #endif
00533 extern __inline__ void gpio_local_clr_gpio_pin(uint32_t pin)
00534 {
00535 AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
00536 }
00537
00549 #if (defined __GNUC__)
00550 __attribute__((__always_inline__))
00551 #endif
00552 extern __inline__ void gpio_local_tgl_gpio_pin(uint32_t pin)
00553 {
00554 AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
00555 }
00556
00565 #if (defined __GNUC__)
00566 __attribute__((__always_inline__))
00567 #endif
00568 extern __inline__ void gpio_local_init_gpio_open_drain_pin(uint32_t pin)
00569 {
00570 AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
00571 }
00572
00583 #if (defined __GNUC__)
00584 __attribute__((__always_inline__))
00585 #endif
00586 extern __inline__ void gpio_local_set_gpio_open_drain_pin(uint32_t pin)
00587 {
00588 AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
00589 }
00590
00601 #if (defined __GNUC__)
00602 __attribute__((__always_inline__))
00603 #endif
00604 extern __inline__ void gpio_local_clr_gpio_open_drain_pin(uint32_t pin)
00605 {
00606 AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
00607 }
00608
00619 #if (defined __GNUC__)
00620 __attribute__((__always_inline__))
00621 #endif
00622 extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(uint32_t pin)
00623 {
00624 AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
00625 }
00626
00628 #endif // AVR32_GPIO_LOCAL_ADDRESS
00629
00630 #if UC3L
00631
00632
00645 #if (defined __GNUC__)
00646 __attribute__((__always_inline__))
00647 #endif
00648 extern __inline__ void gpio_enable_pin_periph_event(uint32_t pin)
00649 {
00650 AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F);
00651 AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
00652 }
00653
00659 #if (defined __GNUC__)
00660 __attribute__((__always_inline__))
00661 #endif
00662 extern __inline__ void gpio_disable_pin_periph_event(uint32_t pin)
00663 {
00664 AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
00665 }
00666
00676 extern int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf);
00677
00679 #endif
00680
00681
00682 #endif // _GPIO_H_