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# gpio.c

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    00001 /* This source file is part of the AVR Software Framework 2.0.0 release */
    00002
    00003 /*This file has been prepared for Doxygen automatic documentation generation.*/
    00017 /* Copyright (c) 2010 Atmel Corporation. All rights reserved.
    00018  *
    00019  * Redistribution and use in source and binary forms, with or without
    00020  * modification, are permitted provided that the following conditions are met:
    00021  *
    00022  * 1. Redistributions of source code must retain the above copyright notice, this
    00023  * list of conditions and the following disclaimer.
    00024  *
    00025  * 2. Redistributions in binary form must reproduce the above copyright notice,
    00026  * this list of conditions and the following disclaimer in the documentation
    00027  * and/or other materials provided with the distribution.
    00028  *
    00029  * 3. The name of Atmel may not be used to endorse or promote products derived
    00030  * from this software without specific prior written permission.
    00031  *
    00032  * 4. This software may only be redistributed and used in connection with an Atmel
    00033  * AVR product.
    00034  *
    00035  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
    00036  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    00037  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
    00038  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
    00039  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    00040  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    00041  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    00042  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    00043  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    00044  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
    00045  *
    00046  */
    00047
    00048 #include "gpio.h"
    00049
    00051 #define GPIO  AVR32_GPIO
    00052
    00053
    00056
    00057
    00058
    00059 int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size)
    00060 {
    00061   int status = GPIO_SUCCESS;
    00062   uint32_t i;
    00063
    00064   for (i = 0; i < size; i++)
    00065   {
    00066     status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
    00067     gpiomap++;
    00068   }
    00069
    00070   return status;
    00071 }
    00072
    00073
    00074 int gpio_enable_module_pin(uint32_t pin, uint32_t function)
    00075 {
    00076   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00077
    00078   // Enable the correct function.
    00079   switch (function)
    00080   {
    00081   case 0: // A function.
    00082     gpio_port->pmr0c = 1 << (pin & 0x1F);
    00083     gpio_port->pmr1c = 1 << (pin & 0x1F);
    00084 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00085     gpio_port->pmr2c = 1 << (pin & 0x1F);
    00086 #endif
    00087     break;
    00088
    00089   case 1: // B function.
    00090     gpio_port->pmr0s = 1 << (pin & 0x1F);
    00091     gpio_port->pmr1c = 1 << (pin & 0x1F);
    00092 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00093     gpio_port->pmr2c = 1 << (pin & 0x1F);
    00094 #endif
    00095     break;
    00096
    00097   case 2: // C function.
    00098     gpio_port->pmr0c = 1 << (pin & 0x1F);
    00099     gpio_port->pmr1s = 1 << (pin & 0x1F);
    00100 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00101     gpio_port->pmr2c = 1 << (pin & 0x1F);
    00102 #endif
    00103     break;
    00104
    00105   case 3: // D function.
    00106     gpio_port->pmr0s = 1 << (pin & 0x1F);
    00107     gpio_port->pmr1s = 1 << (pin & 0x1F);
    00108 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00109     gpio_port->pmr2c = 1 << (pin & 0x1F);
    00110 #endif
    00111     break;
    00112
    00113 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00114   case 4: // E function.
    00115     gpio_port->pmr0c = 1 << (pin & 0x1F);
    00116     gpio_port->pmr1c = 1 << (pin & 0x1F);
    00117     gpio_port->pmr2s = 1 << (pin & 0x1F);
    00118     break;
    00119
    00120   case 5: // F function.
    00121     gpio_port->pmr0s = 1 << (pin & 0x1F);
    00122     gpio_port->pmr1c = 1 << (pin & 0x1F);
    00123     gpio_port->pmr2s = 1 << (pin & 0x1F);
    00124     break;
    00125
    00126   case 6: // G function.
    00127     gpio_port->pmr0c = 1 << (pin & 0x1F);
    00128     gpio_port->pmr1s = 1 << (pin & 0x1F);
    00129     gpio_port->pmr2s = 1 << (pin & 0x1F);
    00130     break;
    00131
    00132   case 7: // H function.
    00133     gpio_port->pmr0s = 1 << (pin & 0x1F);
    00134     gpio_port->pmr1s = 1 << (pin & 0x1F);
    00135     gpio_port->pmr2s = 1 << (pin & 0x1F);
    00136     break;
    00137 #endif
    00138
    00139   default:
    00140     return GPIO_INVALID_ARGUMENT;
    00141   }
    00142
    00143   // Disable GPIO control.
    00144   gpio_port->gperc = 1 << (pin & 0x1F);
    00145
    00146   return GPIO_SUCCESS;
    00147 }
    00148
    00149
    00150 void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size)
    00151 {
    00152   uint32_t i;
    00153
    00154   for (i = 0; i < size; i++)
    00155   {
    00156     gpio_enable_gpio_pin(gpiomap->pin);
    00157     gpiomap++;
    00158   }
    00159 }
    00160
    00161
    00162 void gpio_enable_gpio_pin(uint32_t pin)
    00163 {
    00164   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00165   gpio_port->oderc = 1 << (pin & 0x1F);
    00166   gpio_port->gpers = 1 << (pin & 0x1F);
    00167 }
    00168
    00169
    00170 // The open-drain mode is not synthesized on the current AVR32 products.
    00171 // If one day some AVR32 products have this feature, the corresponding part
    00172 // numbers should be listed in the #if below.
    00173 // Note that other functions are available in this driver to use pins with open
    00174 // drain in GPIO mode. The advantage of the open-drain mode functions over these
    00175 // other functions is that they can be used not only in GPIO mode but also in
    00176 // module mode.
    00177 #if 0
    00178
    00179
    00180 void gpio_enable_pin_open_drain(uint32_t pin)
    00181 {
    00182   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00183   gpio_port->odmers = 1 << (pin & 0x1F);
    00184 }
    00185
    00186
    00187 void gpio_disable_pin_open_drain(uint32_t pin)
    00188 {
    00189   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00190   gpio_port->odmerc = 1 << (pin & 0x1F);
    00191 }
    00192
    00193
    00194 #endif
    00195
    00196
    00197 void gpio_enable_pin_pull_up(uint32_t pin)
    00198 {
    00199   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00200   gpio_port->puers = 1 << (pin & 0x1F);
    00201 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00202   gpio_port->pderc = 1 << (pin & 0x1F);
    00203 #endif
    00204 }
    00205
    00206
    00207 void gpio_disable_pin_pull_up(uint32_t pin)
    00208 {
    00209   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00210   gpio_port->puerc = 1 << (pin & 0x1F);
    00211 }
    00212
    00213 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00214 // Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
    00215
    00220 void gpio_enable_pin_pull_down(uint32_t pin)
    00221 {
    00222   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00223   gpio_port->puerc = 1 << (pin & 0x1F);
    00224   gpio_port->pders = 1 << (pin & 0x1F);
    00225 }
    00226
    00231 void gpio_disable_pin_pull_down(uint32_t pin)
    00232 {
    00233   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00234   gpio_port->pderc = 1 << (pin & 0x1F);
    00235 }
    00236
    00241 void gpio_enable_pin_buskeeper(uint32_t pin)
    00242 {
    00243   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00244   gpio_port->puers = 1 << (pin & 0x1F);
    00245   gpio_port->pders = 1 << (pin & 0x1F);
    00246 }
    00247
    00252 void gpio_disable_pin_buskeeper(uint32_t pin)
    00253 {
    00254   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00255   gpio_port->puerc = 1 << (pin & 0x1F);
    00256   gpio_port->pderc = 1 << (pin & 0x1F);
    00257 }
    00258
    00259 #endif
    00260
    00261 void gpio_configure_pin(uint32_t pin, uint32_t flags)
    00262 {
    00263   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00264
    00265   /* Both pull-up and pull-down set means buskeeper */
    00266 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00267     if (flags & GPIO_PULL_DOWN)
    00268             gpio_port->pders = 1 << (pin & 0x1F);
    00269     else
    00270             gpio_port->pderc = 1 << (pin & 0x1F);
    00271 #endif
    00272     if (flags & GPIO_PULL_UP)
    00273             gpio_port->puers = 1 << (pin & 0x1F);
    00274     else
    00275             gpio_port->puerc = 1 << (pin & 0x1F);
    00276
    00277     /* Enable open-drain mode if requested */
    00278 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00279             if (flags & GPIO_OPEN_DRAIN)
    00280                     gpio_port->odmers = 1 << (pin & 0x1F);
    00281             else
    00282                     gpio_port->odmerc = 1 << (pin & 0x1F);
    00283
    00284             if (flags & GPIO_OPEN_DRAIN)
    00285                     gpio_port->pders = 1 << (pin & 0x1F);
    00286             else
    00287                     gpio_port->pderc = 1 << (pin & 0x1F);
    00288 #endif
    00289
    00290 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00291             /* Select drive strength */
    00292             if (flags & GPIO_DRIVE_LOW)
    00293                     gpio_port->odcr0s = 1 << (pin & 0x1F);
    00294             else
    00295                     gpio_port->odcr0c = 1 << (pin & 0x1F);
    00296             if (flags & GPIO_DRIVE_HIGH)
    00297                     gpio_port->odcr1s = 1 << (pin & 0x1F);
    00298             else
    00299                     gpio_port->odcr1c = 1 << (pin & 0x1F);
    00300 #endif
    00301
    00302     /* Select interrupt level for group */
    00303     if (flags & GPIO_INTERRUPT) {
    00304             if (flags & GPIO_BOTHEDGES)
    00305             {
    00306                    gpio_port->imr0c = 1 << (pin & 0x1F);
    00307                    gpio_port->imr1c = 1 << (pin & 0x1F);
    00308             }
    00309             else if (flags & GPIO_RISING)
    00310             {
    00311                    gpio_port->imr0s = 1 << (pin & 0x1F);
    00312                    gpio_port->imr1c = 1 << (pin & 0x1F);
    00313             }
    00314             else if (flags & GPIO_FALLING)
    00315             {
    00316                    gpio_port->imr0c = 1 << (pin & 0x1F);
    00317                    gpio_port->imr1s = 1 << (pin & 0x1F);
    00318             }
    00319     }
    00320
    00321     /* Select direction and initial pin state */
    00322     if (flags & GPIO_DIR_OUTPUT) {
    00323             if (flags & GPIO_INIT_HIGH)
    00324                     gpio_port->ovrs = 1 << (pin & 0x1F);
    00325             else
    00326                     gpio_port->ovrc = 1 << (pin & 0x1F);
    00327             gpio_port->oders = 1 << (pin & 0x1F);
    00328     } else {
    00329             gpio_port->oderc = 1 << (pin & 0x1F);
    00330     }
    00331
    00332     /* Enable GPIO */
    00333     gpio_port->gpers = 1 << (pin & 0x1F);
    00334 }
    00335
    00336 void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags)
    00337 {
    00338   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port];
    00339
    00340   /* Both pull-up and pull-down set means buskeeper */
    00341 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00342     if (flags & GPIO_PULL_DOWN)
    00343             gpio_port->pders = mask;
    00344     else
    00345             gpio_port->pderc = mask;
    00346 #endif
    00347     if (flags & GPIO_PULL_UP)
    00348             gpio_port->puers = mask;
    00349     else
    00350             gpio_port->puerc = mask;
    00351
    00352     /* Enable open-drain mode if requested */
    00353 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00354             if (flags & GPIO_OPEN_DRAIN)
    00355                     gpio_port->odmers = mask;
    00356             else
    00357                     gpio_port->odmerc = mask;
    00358
    00359             if (flags & GPIO_OPEN_DRAIN)
    00360                     gpio_port->pders = mask;
    00361             else
    00362                     gpio_port->pderc = mask;
    00363 #endif
    00364
    00365 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
    00366             /* Select drive strength */
    00367             if (flags & GPIO_DRIVE_LOW)
    00368                     gpio_port->odcr0s = mask;
    00369             else
    00370                     gpio_port->odcr0c = mask;
    00371             if (flags & GPIO_DRIVE_HIGH)
    00372                     gpio_port->odcr1s = mask;
    00373             else
    00374                     gpio_port->odcr1c = mask;
    00375 #endif
    00376
    00377     /* Select interrupt level for group */
    00378     if (flags & GPIO_INTERRUPT) {
    00379             if (flags & GPIO_BOTHEDGES)
    00380             {
    00381                    gpio_port->imr0c = mask;
    00382                    gpio_port->imr1c = mask;
    00383             }
    00384             else if (flags & GPIO_RISING)
    00385             {
    00386                    gpio_port->imr0s = mask;
    00387                    gpio_port->imr1c = mask;
    00388             }
    00389             else if (flags & GPIO_FALLING)
    00390             {
    00391                    gpio_port->imr0c = mask;
    00392                    gpio_port->imr1s = mask;
    00393             }
    00394     }
    00395
    00396     /* Select direction and initial pin state */
    00397     if (flags & GPIO_DIR_OUTPUT) {
    00398             if (flags & GPIO_INIT_HIGH)
    00399                     gpio_port->ovrs = mask;
    00400             else
    00401                     gpio_port->ovrc = mask;
    00402             gpio_port->oders = mask;
    00403     } else {
    00404             gpio_port->oderc = mask;
    00405     }
    00406
    00407     /* Enable GPIO */
    00408     gpio_port->gpers = mask;
    00409 }
    00410
    00411 int gpio_get_pin_value(uint32_t pin)
    00412 {
    00413   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00414   return (gpio_port->pvr >> (pin & 0x1F)) & 1;
    00415 }
    00416
    00417
    00418 int gpio_get_gpio_pin_output_value(uint32_t pin)
    00419 {
    00420   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00421   return (gpio_port->ovr >> (pin & 0x1F)) & 1;
    00422 }
    00423
    00424
    00425 int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin)
    00426 {
    00427   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00428   return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
    00429 }
    00430
    00431
    00432 void gpio_set_gpio_pin(uint32_t pin)
    00433 {
    00434   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00435   gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
    00436   gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
    00437   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00438 }
    00439
    00440 void gpio_set_pin_high(uint32_t pin)
    00441 {
    00442   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00443   gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
    00444 }
    00445
    00446 void gpio_set_group_high(uint32_t port, uint32_t mask)
    00447 {
    00448   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port];
    00449   gpio_port->ovrs  = mask; // Value to be driven on the I/O group: 1.
    00450 }
    00451
    00452
    00453 void gpio_set_pin_low(uint32_t pin)
    00454 {
    00455   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00456   gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
    00457 }
    00458
    00459 void gpio_clr_gpio_pin(uint32_t pin)
    00460 {
    00461   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00462   gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
    00463   gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
    00464   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00465 }
    00466
    00467 void gpio_set_group_low(uint32_t port, uint32_t mask)
    00468 {
    00469   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port];
    00470   gpio_port->ovrc  = mask; // Value to be driven on the I/O group: 0.
    00471 }
    00472
    00473 void gpio_tgl_gpio_pin(uint32_t pin)
    00474 {
    00475   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00476   gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
    00477   gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
    00478   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00479 }
    00480
    00481 void gpio_toggle_pin(uint32_t pin)
    00482 {
    00483   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00484   gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
    00485 }
    00486
    00487 void gpio_toggle_group(uint32_t port, uint32_t mask)
    00488 {
    00489   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port];
    00490   gpio_port->ovrt  = mask; // Toggle the I/O port.
    00491 }
    00492
    00493 void gpio_set_gpio_open_drain_pin(uint32_t pin)
    00494 {
    00495   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00496
    00497   gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
    00498   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00499 }
    00500
    00501
    00502 void gpio_clr_gpio_open_drain_pin(uint32_t pin)
    00503 {
    00504   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00505
    00506   gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
    00507   gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
    00508   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00509 }
    00510
    00511
    00512 void gpio_tgl_gpio_open_drain_pin(uint32_t pin)
    00513 {
    00514   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00515
    00516   gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
    00517   gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
    00518   gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
    00519 }
    00520
    00521
    00522 void gpio_enable_pin_glitch_filter(uint32_t pin)
    00523 {
    00524   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00525   gpio_port->gfers = 1 << (pin & 0x1F);
    00526 }
    00527
    00528
    00529 void gpio_disable_pin_glitch_filter(uint32_t pin)
    00530 {
    00531   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00532   gpio_port->gferc = 1 << (pin & 0x1F);
    00533 }
    00534
    00543 static int gpio_configure_edge_detector(uint32_t pin, uint32_t mode)
    00544 {
    00545   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00546
    00547   // Configure the edge detector.
    00548   switch (mode)
    00549   {
    00550   case GPIO_PIN_CHANGE:
    00551     gpio_port->imr0c = 1 << (pin & 0x1F);
    00552     gpio_port->imr1c = 1 << (pin & 0x1F);
    00553     break;
    00554
    00555   case GPIO_RISING_EDGE:
    00556     gpio_port->imr0s = 1 << (pin & 0x1F);
    00557     gpio_port->imr1c = 1 << (pin & 0x1F);
    00558     break;
    00559
    00560   case GPIO_FALLING_EDGE:
    00561     gpio_port->imr0c = 1 << (pin & 0x1F);
    00562     gpio_port->imr1s = 1 << (pin & 0x1F);
    00563     break;
    00564
    00565   default:
    00566     return GPIO_INVALID_ARGUMENT;
    00567   }
    00568
    00569   return GPIO_SUCCESS;
    00570 }
    00571
    00572
    00573 int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode)
    00574 {
    00575   volatile avr32_gpio_port_t  *gpio_port = &GPIO.port[pin >> 5];
    00576
    00577   // Enable the glitch filter.
    00578   gpio_port->gfers = 1 << (pin & 0x1F);
    00579
    00580   // Configure the edge detector.
    00581   if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
    00582     return(GPIO_INVALID_ARGUMENT);
    00583
    00584   // Enable interrupt.
    00585   gpio_port->iers = 1 << (pin & 0x1F);
    00586
    00587   return GPIO_SUCCESS;
    00588 }
    00589
    00590
    00591 void gpio_disable_pin_interrupt(uint32_t pin)
    00592 {
    00593   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00594   gpio_port->ierc = 1 << (pin & 0x1F);
    00595 }
    00596
    00597
    00598 int gpio_get_pin_interrupt_flag(uint32_t pin)
    00599 {
    00600   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00601   return (gpio_port->ifr >> (pin & 0x1F)) & 1;
    00602 }
    00603
    00604
    00605 void gpio_clear_pin_interrupt_flag(uint32_t pin)
    00606 {
    00607   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00608   gpio_port->ifrc = 1 << (pin & 0x1F);
    00609 }
    00610
    00611
    00612 //#
    00613 //# Peripheral Event System Support.
    00614 //#
    00615 #if UC3L
    00616 int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf)
    00617 {
    00618   volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
    00619
    00620   if(TRUE == use_igf)
    00621   {
    00622     // Enable the glitch filter.
    00623     gpio_port->gfers = 1 << (pin & 0x1F);
    00624   }
    00625   else
    00626   {
    00627     // Disable the glitch filter.
    00628     gpio_port->gferc = 1 << (pin & 0x1F);
    00629   }
    00630
    00631   // Configure the edge detector.
    00632   return(gpio_configure_edge_detector(pin, mode));
    00633 }
    00634
    00635 #endif
    00636