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# AVR Software Framework: UC3 FLASHC Driver

Copyright © 2007 Atmel Corporation

## Introduction

The flash controller (FLASHC) interfaces a flash block with the 32-bit internal HSB bus. Performance for uncached systems with high clock-frequency and one wait state is increased by placing words with sequential addresses in alternating flash subblocks. Having one read interface per subblock allows them to be read in parallel. While data from one flash subblock is being output on the bus, the sequential address is being read from the other flash subblock and will be ready in the next clock cycle.

The controller also manages the programming, erasing, locking and unlocking sequences with dedicated commands.

## FLASHC Driver

The driver is composed of flashc.c and flashc.h.

One example is currently available:

- Example using the FLASHC driver to access flash pages.

AVR is a registered trademark of Atmel Corporation.

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