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# drivers/timer/tc_regs.h

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    00001
    00042 #ifndef TIMER_TC_REGS_H_INCLUDED
    00043 #define TIMER_TC_REGS_H_INCLUDED
    00044
    00045 #include <chip/memory-map.h>
    00046 #include <io.h>
    00047
    00048 /* Register offsets */
    00049 #define TC_BCR                          0x00c0
    00050 #define TC_BMR                          0x00c4
    00051
    00052 #define TC_CCR                          0x0000
    00053 #define TC_CMR                          0x0004
    00054 #define TC_CV                           0x0010
    00055 #define TC_RA                           0x0014
    00056 #define TC_RB                           0x0018
    00057 #define TC_RC                           0x001c
    00058 #define TC_SR                           0x0020
    00059 #define TC_IER                          0x0024
    00060 #define TC_IDR                          0x0028
    00061 #define TC_IMR                          0x002c
    00062
    00063
    00064 #define TC_CCR_CLKEN_MASK               (1 << 0)
    00065 #define TC_CCR_SWTRG_MASK               (1 << 2)
    00066 #define TC_CCR_CLKDIS_MASK              (1 << 1)
    00067
    00068 #define TC_CMR_WAVE_MASK                (1 << 15)
    00069
    00070 #define TC_SR_COVFS_MASK                (1 << 0)
    00071 #define TC_SR_CPAS_MASK                 (1 << 2)
    00072
    00073
    00075 #define tc_read_reg(port, reg)                          \
    00076         mmio_read32((port) + TC_##reg)
    00077
    00078 #define tc_write_reg(port, reg, value)                  \
    00079         mmio_write32((port) + TC_##reg, value)
    00080
    00081 #endif /* TIMER_TC_REGS_H_INCLUDED */
    00082