# drivers/usb/usbb_regs.h File Reference

USBB register definitions. More...

`#include <stdint.h>`

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## Defines
USBB DMA registers
#define | USBB_DMA_NEXTDESC 0x0000
| Next descriptor address.
#define | USBB_DMA_ADDR 0x0004
| DMA Buffer address.
#define | USBB_DMA_CONTROL 0x0008
| DMA Control Register.
#define | USBB_DMA_CH_EN (1 << 0)
| Channel enabled.
#define | USBB_DMA_LD_NXT_CH_DESC_EN (1 << 1)
| Load next desc.
#define | USBB_DMA_BUFF_CLOSE_IN_EN (1 << 2)
| RX done on short.
#define | USBB_DMA_DMAEND_EN (1 << 3)
| Last buffer.
#define | USBB_DMA_EOT (1 << 4)
| End of transfer.
#define | USBB_DMA_EOBUFF (1 << 5)
| End of buffer.
#define | USBB_DMA_DESC_LD (1 << 6)
| Descriptor loaded.
#define | USBB_DMA_BURST_LOCK_EN (1 << 7)
| Burst lock enable.
#define | USBB_DMA_BYTE_LEN(x) ((x) << 16)
| Bytes remaining.
#define | USBB_DMA_GET_BYTE_LEN(reg) (((reg) >> 16) & 0xffff)
#define | USBB_DMA_STATUS 0x000c
| DMA Status Register.
#define | USBB_DMA_CH_ACTIVE (1 << 1)
| Channel active.
USBB Device Registers
#define | USBB_UDC_UDCON 0x0000
| Control Register.
#define | USBB_UDCON_UADD(addr) ((addr) << 0)
| Device address.
#define | USBB_UDCON_UADD_MASK (0x7f << 0)
#define | USBB_UDCON_ADDEN (1 << 7)
| Address enable.
#define | USBB_UDCON_DETACH (1 << 8)
| Detach from bus.
#define | USBB_UDCON_RMWKUP (1 << 9)
| Send remote wakeup.
#define | USBB_UDCON_SPDCONF_MASK (3 << 10)
| Force bus speed.
#define | USBB_UDCON_SPDCONF_NORMAL (0 << 10)
| Dual-speed.
#define | USBB_UDCON_SPDCONF_FULL (3 << 10)
| Full-speed.
#define | USBB_UDCON_LS (1 << 12)
| Low-speed.
#define | USBB_UDCON_TSTJ (1 << 13)
| Test_J mode.
#define | USBB_UDCON_TSTK (1 << 14)
| Test_K mode.
#define | USBB_UDCON_TSTPCKT (1 << 15)
| Test_Packet mode.
#define | USBB_UDCON_OPMODE2 (1 << 16)
#define | USBB_UDC_UDINT 0x0004
| Interrupt Register.
#define | USBB_UDC_UDINTCLR 0x0008
| Interrupt Clear.
#define | USBB_UDC_UDINTSET 0x000c
| Interrupt Set.
#define | USBB_UDC_UDINTE 0x0010
| Interrupt Enable.
#define | USBB_UDC_UDINTECLR 0x0014
| Interrupt Enable Clear.
#define | USBB_UDC_UDINTESET 0x0018
| Interrupt Enable Set.
#define | USBB_UDINT_SUSP (1 << 0)
| Device suspended.
#define | USBB_UDINT_MSOF (1 << 1)
| Start of uFrame.
#define | USBB_UDINT_SOF (1 << 2)
| Start of frame.
#define | USBB_UDINT_EORST (1 << 3)
| End of reset.
#define | USBB_UDINT_WAKEUP (1 << 4)
| Wake up device.
#define | USBB_UDINT_EORSM (1 << 5)
| End of resume.
#define | USBB_UDINT_UPRSM (1 << 6)
| Upstream resume.
#define | USBB_UDINT_EP(x) (1 << ((x) + 12))
| EP interrupt.
#define | USBB_UDINT_DMA(x) (1 << ((x) + 24))
| DMA interrupt.
#define | USBB_UDC_UERST 0x001c
| Endpoint Enable / Reset.
#define | USBB_UERST_EPEN(x) (1 << ((x) + 0))
| Endpoint enable.
#define | USBB_UERST_EPRST(x) (1 << ((x) + 16))
| Endpoint reset.
#define | USBB_UDC_UDFNUM 0x0020
| Frame Number.
#define | USBB_UDFNUM_GET_MFNUM(reg) ((reg) & 7)
| uFrame number
#define | USBB_UDFNUM_GET_FNUM(reg) (((reg) >> 3) & 0x7ff)
| frame num
#define | USBB_UDFNUM_FNCERR (1 << 15)
| CRC error.
#define | USBB_UDC_UDTST1 0x0024
| Test Register 1.
#define | USBB_UDC_UDTST2 0x0028
| Test Register 2.
USBB Endpoint Registers
#define | USBB_UDC_UECFG(x) (0x100 + (x) * 4)
| Endpoint Config.
#define | USBB_UECFG_ALLOC (1 << 1)
| Allocate ep mem.
#define | USBB_UECFG_EPBK(x) ((x) << 2)
| Number of banks.
#define | USBB_UECFG_EPSIZE(x) ((x) << 4)
| Endpoint size.
#define | USBB_UECFG_EPDIR_OUT (0 << 8)
| OUT or control.
#define | USBB_UECFG_EPDIR_IN (1 << 8)
| IN direction.
#define | USBB_UECFG_EPAUTOSW (1 << 9)
| Automatic switch.
#define | USBB_UECFG_EPTYPE(x) ((x) << 11)
| Endpoint type.
#define | USBB_UECFG_NBTRANS(x) ((x) << 13)
| Trans/uframe.
#define | USBB_UDC_UESTA(x) (0x130 + (x) * 4)
| EPx Status.
#define | USBB_UDC_UESTACLR(x) (0x160 + (x) * 4)
| EPx Status Clear.
#define | USBB_UDC_UESTASET(x) (0x190 + (x) * 4)
| EPx Status Set.
#define | USBB_UESTA_GET_DTSEQ(x) (((x) >> 8) & 3)
| Current data PID.
#define | USBB_UESTA_GET_NBUSYBK(x) (((x) >> 12) & 3)
| # busy banks
#define | USBB_UESTA_GET_CURRBK(x) (((x) >> 14) & 3)
| Current bank.
#define | USBB_UESTA_RWALL (1 << 16)
| Read/write allowed.
#define | USBB_UESTA_CTRLDIR_IN (1 << 17)
| Control direction.
#define | USBB_UESTA_CFGOK (1 << 18)
| Ep config OK.
#define | USBB_UESTA_GET_BYCT(x) (((x) >> 20) & 0x7ff)
| Byte count.
#define | USBB_UDC_UECON(x) (0x1c0 + (x) * 4)
| EPx Ctrl.
#define | USBB_UDC_UECONSET(x) (0x1f0 + (x) * 4)
| EPx Ctrl Set.
#define | USBB_UDC_UECONCLR(x) (0x220 + (x) * 4)
| EPx Ctrl Clear.
#define | USBB_UECON_MDATAE (1 << 8)
| MDATA int enable.
#define | USBB_UECON_DATAXE (1 << 9)
| DATAX int enable.
#define | USBB_UECON_NBUSYBKE (1 << 12)
| Idle int enable.
#define | USBB_UECON_KILLBK (1 << 13)
| Free last IN bank.
#define | USBB_UECON_FIFOCON (1 << 14)
| FIFO control.
#define | USBB_UECON_EPDISHDMA (1 << 16)
| Int stops DMA.
#define | USBB_UECON_NYETDIS (1 << 17)
| Disable NYET.
#define | USBB_UECON_RSTDT (1 << 18)
| Reset Data Toggle.
#define | USBB_UECON_STALLRQ (1 << 19)
| Send STALL.
Endpoint Interrupt bits
#define | USBB_EP_TXINI (1 << 0)
| TX IN ready.
#define | USBB_EP_RXOUTI (1 << 1)
| RX OUT ready.
#define | USBB_EP_RXSTPI (1 << 2)
| RX SETUP ready.
#define | USBB_EP_UNDERFI (1 << 2)
| Iso flow error.
#define | USBB_EP_NAKOUTI (1 << 3)
| OUT NAK sent.
#define | USBB_EP_HBISOINERRI (1 << 3)
| HB iso underflow.
#define | USBB_EP_NAKINI (1 << 4)
| IN NAK sent.
#define | USBB_EP_HBISOFLUSHI (1 << 4)
| HB iso flushed.
#define | USBB_EP_OVERFI (1 << 5)
| FIFO overflow.
#define | USBB_EP_STALLEDI (1 << 6)
| STALL sent.
#define | USBB_EP_CRCERRI (1 << 6)
| Iso CRC error.
#define | USBB_EP_SHORTI (1 << 7)
| Short packet.
#define | USBB_EP_ERRORTRANSI (1 << 10)
| Iso PID error.
USBB Host Registers
#define | USBB_HOST_UHCON 0x0400
| Host Control.
#define | USBB_HOST_UHINT 0x0404
| Interrupt.
#define | USBB_HOST_UHINTCLR 0x0408
| Interrupt Clear.
#define | USBB_HOST_UHINTSET 0x040c
| Interrupt Set.
#define | USBB_HOST_UHINTE 0x0410
| Interrupt Enable.
#define | USBB_HOST_UHINTECLR 0x0414
| Interrupt Enable Clear.
#define | USBB_HOST_UHINTESET 0x0418
| Interrupt Enable Set.
#define | USBB_HOST_UPRST 0x041c
| Pipe Enable/Reset.
#define | USBB_HOST_UHFNUM 0x0420
| Frame Number.
#define | USBB_HOST_UHADDR1 0x0424
| Host Address 1.
#define | USBB_HOST_UHADDR2 0x0428
| Host Address 2.
USBB Pipe Registers
#define | USBB_HOST_UPCFG(x) (0x500 + 4 * (x))
| Pipe Config.
#define | USBB_HOST_UPSTA(x) (0x530 + 4 * (x))
| Pipe Status.
#define | USBB_HOST_UPSTACLR(x) (0x560 + 4 * (x))
| Pipe Status Clear.
#define | USBB_HOST_UPSTASET(x) (0x590 + 4 * (x))
| Pipe Status Set.
#define | USBB_HOST_UPCON(x) (0x5c0 + 4 * (x))
| Pipe Ctrl.
#define | USBB_HOST_UPCONSET(x) (0x5f0 + 4 * (x))
| Pipe Ctrl Set.
#define | USBB_HOST_UPCONCLR(x) (0x620 + 4 * (x))
| Pipe Ctrl Clear.
#define | USBB_HOST_UPINRQ(x) (0x650 + 4 * (x))
| Pipe IN Request.
#define | USBB_HOST_UPERR(x) (0x680 + 4 * (x))
| Pipe Error.
USBB Core Registers
#define | USBB_CORE_USBCON 0x0800
| USB Control.
#define | USBB_USBCON_VBUSHWC (1 << 8)
| Vbus HW control.
#define | USBB_USBCON_SRPSEL (1 << 9)
| SRP method.
#define | USBB_USBCON_SRPREQ (1 << 10)
| SRP request.
#define | USBB_USBCON_HNPREQ (1 << 11)
| HNP request.
#define | USBB_USBCON_OTGPADE (1 << 12)
| OTG pad enable.
#define | USBB_USBCON_VBUSPO (1 << 13)
| Vbus polarity.
#define | USBB_USBCON_FRZCLK (1 << 14)
| Freeze clock.
#define | USBB_USBCON_USBE (1 << 15)
| Enable controller.
#define | USBB_USBCON_TIMVALUE(x) ((x) << 16)
| Timer value.
#define | USBB_USBCON_TIMPAGE(x) ((x) << 20)
| Timer page.
#define | USBB_USBCON_UNLOCK (1 << 22)
| Timer unlock.
#define | USBB_USBCON_UIDE (1 << 24)
| ID pin enable.
#define | USBB_USBCON_UIMOD_HOST (0 << 25)
| Host mode.
#define | USBB_USBCON_UIMOD_DEVICE (1 << 25)
| Device mode.
#define | USBB_CORE_USBSTA 0x0804
| USB Status.
#define | USBB_CORE_USBSTACLR 0x0808
| USB Status Clear.
#define | USBB_CORE_USBSTASET 0x080c
| USB Status Set.
#define | USBB_USBSTA_VBUSRQ (1 << 9)
| Vbus request.
#define | USBB_USBSTA_ID (1 << 10)
| ID pin state.
#define | USBB_USBSTA_VBUS (1 << 11)
| Vbus available.
#define | USBB_USBSTA_SPEED_MASK (3 << 12)
| Bus connection.
#define | USBB_USBSTA_SPEED_FULL (0 << 12)
| Full-speed.
#define | USBB_USBSTA_SPEED_HIGH (1 << 12)
| High-speed.
#define | USBB_USBSTA_SPEED_LOW (2 << 12)
| Low-speed.
#define | USBB_USBSTA_CLKUSABLE (1 << 14)
| UTMI clock OK.
USBB Core Interrupt Bits
#define | USBB_IDTI (1 << 0)
| ID transition.
#define | USBB_VBUSTI (1 << 1)
| Vbus transition.
#define | USBB_SRPI (1 << 2)
| SRP detected.
#define | USBB_VBERRI (1 << 3)
| Vbus error.
#define | USBB_BCERRI (1 << 4)
| B conn error.
#define | USBB_ROLEEXI (1 << 5)
| Roles switched.
#define | USBB_HNPERRI (1 << 6)
| HNP error.
#define | USBB_STOI (1 << 7)
| Suspend time-out.
#define | USBB_CORE_USBFSM 0x082c

## Detailed Description

USBB register definitions.

- Compiler: IAR EWAVR32 and GNU GCC for AVR32
- Supported devices: All AVR32 devices with a USBB module can be used.
- AppNote:

Author:
  Atmel Corporation: http://www.atmel.com
  Support and FAQ: http://support.atmel.no/

Definition in file usbb_regs.h.

## Define Documentation

#define USBB_BCERRI (1 << 4)

B conn error.

Definition at line 231 of file usbb_regs.h.

#define USBB_CORE_USBCON 0x0800

USB Control.

Definition at line 197 of file usbb_regs.h.

#define USBB_CORE_USBSTA 0x0804

USB Status.

Definition at line 213 of file usbb_regs.h.

#define USBB_CORE_USBSTACLR 0x0808

USB Status Clear.

Definition at line 214 of file usbb_regs.h.

#define USBB_CORE_USBSTASET 0x080c

USB Status Set.

Definition at line 215 of file usbb_regs.h.

#define USBB_DMA_ADDR 0x0004

DMA Buffer address.

Definition at line 49 of file usbb_regs.h.

#define USBB_DMA_BUFF_CLOSE_IN_EN (1 << 2)

RX done on short.

Definition at line 53 of file usbb_regs.h.

Referenced by usbb_udc_submit_out_queue().

#define USBB_DMA_BURST_LOCK_EN (1 << 7)

Burst lock enable.

Definition at line 58 of file usbb_regs.h.

#define USBB_DMA_BYTE_LEN | ( | x |  | ) | ((x) << 16)

Bytes remaining.

Definition at line 59 of file usbb_regs.h.

Referenced by usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().

#define USBB_DMA_CH_ACTIVE (1 << 1)

Channel active.

Definition at line 63 of file usbb_regs.h.

Referenced by usbb_udc_dma_interrupt().

#define USBB_DMA_CH_EN (1 << 0)

Channel enabled.

Definition at line 51 of file usbb_regs.h.

Referenced by usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().

#define USBB_DMA_CONTROL 0x0008

DMA Control Register.

Definition at line 50 of file usbb_regs.h.

#define USBB_DMA_DESC_LD (1 << 6)

Descriptor loaded.

Definition at line 57 of file usbb_regs.h.

#define USBB_DMA_DMAEND_EN (1 << 3)

Last buffer.

Definition at line 54 of file usbb_regs.h.

Referenced by usbb_udc_submit_in_queue().

#define USBB_DMA_EOBUFF (1 << 5)

End of buffer.

Definition at line 56 of file usbb_regs.h.

Referenced by usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().

#define USBB_DMA_EOT (1 << 4)

End of transfer.

Definition at line 55 of file usbb_regs.h.

Referenced by usbb_udc_dma_interrupt(), and usbb_udc_submit_out_queue().

#define USBB_DMA_LD_NXT_CH_DESC_EN (1 << 1)

Load next desc.

Definition at line 52 of file usbb_regs.h.

Referenced by usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().

#define USBB_DMA_NEXTDESC 0x0000

Next descriptor address.

Definition at line 48 of file usbb_regs.h.

#define USBB_DMA_STATUS 0x000c

DMA Status Register.

Definition at line 62 of file usbb_regs.h.

#define USBB_EP_CRCERRI (1 << 6)

Iso CRC error.

Definition at line 160 of file usbb_regs.h.

#define USBB_EP_ERRORTRANSI (1 << 10)

Iso PID error.

Definition at line 162 of file usbb_regs.h.

#define USBB_EP_HBISOFLUSHI (1 << 4)

HB iso flushed.

Definition at line 157 of file usbb_regs.h.

#define USBB_EP_HBISOINERRI (1 << 3)

HB iso underflow.

Definition at line 155 of file usbb_regs.h.

#define USBB_EP_NAKINI (1 << 4)

IN NAK sent.

Definition at line 156 of file usbb_regs.h.

#define USBB_EP_NAKOUTI (1 << 3)

OUT NAK sent.

Definition at line 154 of file usbb_regs.h.

#define USBB_EP_OVERFI (1 << 5)

FIFO overflow.

Definition at line 158 of file usbb_regs.h.

#define USBB_EP_RXOUTI (1 << 1)

RX OUT ready.

Definition at line 151 of file usbb_regs.h.

Referenced by udc_ep0_send_status(), and udc_ep0_submit_out_req().

#define USBB_EP_RXSTPI (1 << 2)

RX SETUP ready.

Definition at line 152 of file usbb_regs.h.

#define USBB_EP_SHORTI (1 << 7)

Short packet.

Definition at line 161 of file usbb_regs.h.

#define USBB_EP_STALLEDI (1 << 6)

STALL sent.

Definition at line 159 of file usbb_regs.h.

#define USBB_EP_TXINI (1 << 0)

TX IN ready.

Definition at line 150 of file usbb_regs.h.

Referenced by udc_ep0_expect_status(), udc_ep0_send_status(), udc_ep0_submit_in_req(), and udc_ep0_write_sync().

#define USBB_EP_UNDERFI (1 << 2)

Iso flow error.

Definition at line 153 of file usbb_regs.h.

#define USBB_HNPERRI (1 << 6)

HNP error.

Definition at line 233 of file usbb_regs.h.

#define USBB_HOST_UHADDR1 0x0424

Host Address 1.

Definition at line 178 of file usbb_regs.h.

#define USBB_HOST_UHADDR2 0x0428

Host Address 2.

Definition at line 179 of file usbb_regs.h.

#define USBB_HOST_UHCON 0x0400

Host Control.

Definition at line 169 of file usbb_regs.h.

#define USBB_HOST_UHFNUM 0x0420

Frame Number.

Definition at line 177 of file usbb_regs.h.

#define USBB_HOST_UHINT 0x0404

Interrupt.

Definition at line 170 of file usbb_regs.h.

#define USBB_HOST_UHINTCLR 0x0408

Interrupt Clear.

Definition at line 171 of file usbb_regs.h.

#define USBB_HOST_UHINTE 0x0410

Interrupt Enable.

Definition at line 173 of file usbb_regs.h.

#define USBB_HOST_UHINTECLR 0x0414

Interrupt Enable Clear.

Definition at line 174 of file usbb_regs.h.

#define USBB_HOST_UHINTESET 0x0418

Interrupt Enable Set.

Definition at line 175 of file usbb_regs.h.

#define USBB_HOST_UHINTSET 0x040c

Interrupt Set.

Definition at line 172 of file usbb_regs.h.

#define USBB_HOST_UPCFG | ( | x |  | ) | (0x500 + 4 * (x))

Pipe Config.

Definition at line 183 of file usbb_regs.h.

#define USBB_HOST_UPCON | ( | x |  | ) | (0x5c0 + 4 * (x))

Pipe Ctrl.

Definition at line 187 of file usbb_regs.h.

#define USBB_HOST_UPCONCLR | ( | x |  | ) | (0x620 + 4 * (x))

Pipe Ctrl Clear.

Definition at line 189 of file usbb_regs.h.

#define USBB_HOST_UPCONSET | ( | x |  | ) | (0x5f0 + 4 * (x))

Pipe Ctrl Set.

Definition at line 188 of file usbb_regs.h.

#define USBB_HOST_UPERR | ( | x |  | ) | (0x680 + 4 * (x))

Pipe Error.

Definition at line 191 of file usbb_regs.h.

#define USBB_HOST_UPINRQ | ( | x |  | ) | (0x650 + 4 * (x))

Pipe IN Request.

Definition at line 190 of file usbb_regs.h.

#define USBB_HOST_UPRST 0x041c

Pipe Enable/Reset.

Definition at line 176 of file usbb_regs.h.

#define USBB_HOST_UPSTA | ( | x |  | ) | (0x530 + 4 * (x))

Pipe Status.

Definition at line 184 of file usbb_regs.h.

#define USBB_HOST_UPSTACLR | ( | x |  | ) | (0x560 + 4 * (x))

Pipe Status Clear.

Definition at line 185 of file usbb_regs.h.

#define USBB_HOST_UPSTASET | ( | x |  | ) | (0x590 + 4 * (x))

Pipe Status Set.

Definition at line 186 of file usbb_regs.h.

#define USBB_IDTI (1 << 0)

ID transition.

Definition at line 227 of file usbb_regs.h.

Referenced by usbb_init(), and usbb_interrupt().

#define USBB_ROLEEXI (1 << 5)

Roles switched.

Definition at line 232 of file usbb_regs.h.

#define USBB_SRPI (1 << 2)

SRP detected.

Definition at line 229 of file usbb_regs.h.

#define USBB_STOI (1 << 7)

Suspend time-out.

Definition at line 234 of file usbb_regs.h.

#define USBB_UDC_UDCON 0x0000

Control Register.

Definition at line 68 of file usbb_regs.h.

#define USBB_UDC_UDFNUM 0x0020

Frame Number.

Definition at line 104 of file usbb_regs.h.

#define USBB_UDC_UDINT 0x0004

Interrupt Register.

Definition at line 84 of file usbb_regs.h.

#define USBB_UDC_UDINTCLR 0x0008

Interrupt Clear.

Definition at line 85 of file usbb_regs.h.

#define USBB_UDC_UDINTE 0x0010

Interrupt Enable.

Definition at line 87 of file usbb_regs.h.

#define USBB_UDC_UDINTECLR 0x0014

Interrupt Enable Clear.

Definition at line 88 of file usbb_regs.h.

#define USBB_UDC_UDINTESET 0x0018

Interrupt Enable Set.

Definition at line 89 of file usbb_regs.h.

#define USBB_UDC_UDINTSET 0x000c

Interrupt Set.

Definition at line 86 of file usbb_regs.h.

#define USBB_UDC_UDTST1 0x0024

Test Register 1.

Definition at line 109 of file usbb_regs.h.

#define USBB_UDC_UDTST2 0x0028

Test Register 2.

Definition at line 110 of file usbb_regs.h.

#define USBB_UDC_UECFG | ( | x |  | ) | (0x100 + (x) * 4)

Endpoint Config.

Definition at line 114 of file usbb_regs.h.

#define USBB_UDC_UECON | ( | x |  | ) | (0x1c0 + (x) * 4)

EPx Ctrl.

Definition at line 135 of file usbb_regs.h.

#define USBB_UDC_UECONCLR | ( | x |  | ) | (0x220 + (x) * 4)

EPx Ctrl Clear.

Definition at line 137 of file usbb_regs.h.

#define USBB_UDC_UECONSET | ( | x |  | ) | (0x1f0 + (x) * 4)

EPx Ctrl Set.

Definition at line 136 of file usbb_regs.h.

#define USBB_UDC_UERST 0x001c

Endpoint Enable / Reset.

Definition at line 100 of file usbb_regs.h.

#define USBB_UDC_UESTA | ( | x |  | ) | (0x130 + (x) * 4)

EPx Status.

Definition at line 124 of file usbb_regs.h.

#define USBB_UDC_UESTACLR | ( | x |  | ) | (0x160 + (x) * 4)

EPx Status Clear.

Definition at line 125 of file usbb_regs.h.

#define USBB_UDC_UESTASET | ( | x |  | ) | (0x190 + (x) * 4)

EPx Status Set.

Definition at line 126 of file usbb_regs.h.

#define USBB_UDCON_ADDEN (1 << 7)

Address enable.

Definition at line 71 of file usbb_regs.h.

#define USBB_UDCON_DETACH (1 << 8)

Detach from bus.

Definition at line 72 of file usbb_regs.h.

#define USBB_UDCON_LS (1 << 12)

Low-speed.

Definition at line 77 of file usbb_regs.h.

Referenced by usbb_udc_init().

#define USBB_UDCON_OPMODE2 (1 << 16)

Disable bit-stuffing and NRZI encoding

Definition at line 81 of file usbb_regs.h.

#define USBB_UDCON_RMWKUP (1 << 9)

Send remote wakeup.

Definition at line 73 of file usbb_regs.h.

#define USBB_UDCON_SPDCONF_FULL (3 << 10)

Full-speed.

Definition at line 76 of file usbb_regs.h.

Referenced by usbb_udc_init().

#define USBB_UDCON_SPDCONF_MASK (3 << 10)

Force bus speed.

Definition at line 74 of file usbb_regs.h.

#define USBB_UDCON_SPDCONF_NORMAL (0 << 10)

Dual-speed.

Definition at line 75 of file usbb_regs.h.

#define USBB_UDCON_TSTJ (1 << 13)

Test_J mode.

Definition at line 78 of file usbb_regs.h.

#define USBB_UDCON_TSTK (1 << 14)

Test_K mode.

Definition at line 79 of file usbb_regs.h.

#define USBB_UDCON_TSTPCKT (1 << 15)

Test_Packet mode.

Definition at line 80 of file usbb_regs.h.

#define USBB_UDCON_UADD | ( | addr |  | ) | ((addr) << 0)

Device address.

Definition at line 69 of file usbb_regs.h.

#define USBB_UDFNUM_FNCERR (1 << 15)

CRC error.

Definition at line 107 of file usbb_regs.h.

#define USBB_UDFNUM_GET_FNUM | ( | reg |  | ) | (((reg) >> 3) & 0x7ff)

frame num

Definition at line 106 of file usbb_regs.h.

#define USBB_UDFNUM_GET_MFNUM | ( | reg |  | ) | ((reg) & 7)

uFrame number

Definition at line 105 of file usbb_regs.h.

#define USBB_UDINT_DMA | ( | x |  | ) | (1 << ((x) + 24))

DMA interrupt.

Definition at line 98 of file usbb_regs.h.

Referenced by usbb_udc_dma_interrupt(), usbb_udc_softirq(), usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().

#define USBB_UDINT_EORSM (1 << 5)

End of resume.

Definition at line 95 of file usbb_regs.h.

#define USBB_UDINT_EORST (1 << 3)

End of reset.

Definition at line 93 of file usbb_regs.h.

Referenced by usbb_udc_softirq().

#define USBB_UDINT_EP | ( | x |  | ) | (1 << ((x) + 12))

EP interrupt.

Definition at line 97 of file usbb_regs.h.

Referenced by udc_ep_create(), and usbb_udc_softirq().

#define USBB_UDINT_MSOF (1 << 1)

Start of uFrame.

Definition at line 91 of file usbb_regs.h.

#define USBB_UDINT_SOF (1 << 2)

Start of frame.

Definition at line 92 of file usbb_regs.h.

#define USBB_UDINT_SUSP (1 << 0)

Device suspended.

Definition at line 90 of file usbb_regs.h.

#define USBB_UDINT_UPRSM (1 << 6)

Upstream resume.

Definition at line 96 of file usbb_regs.h.

#define USBB_UDINT_WAKEUP (1 << 4)

Wake up device.

Definition at line 94 of file usbb_regs.h.

#define USBB_UECFG_ALLOC (1 << 1)

Allocate ep mem.

Definition at line 115 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UECFG_EPAUTOSW (1 << 9)

Automatic switch.

Definition at line 120 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UECFG_EPBK | ( | x |  | ) | ((x) << 2)

Number of banks.

Definition at line 116 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UECFG_EPDIR_IN (1 << 8)

IN direction.

Definition at line 119 of file usbb_regs.h.

Referenced by udc_ep_set_halt(), and usbb_udc_configure_ep().

#define USBB_UECFG_EPDIR_OUT (0 << 8)

OUT or control.

Definition at line 118 of file usbb_regs.h.

#define USBB_UECFG_EPSIZE | ( | x |  | ) | ((x) << 4)

Endpoint size.

Definition at line 117 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UECFG_EPTYPE | ( | x |  | ) | ((x) << 11)

Endpoint type.

Definition at line 121 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UECFG_NBTRANS | ( | x |  | ) | ((x) << 13)

Trans/uframe.

Definition at line 122 of file usbb_regs.h.

#define USBB_UECON_DATAXE (1 << 9)

DATAX int enable.

Definition at line 139 of file usbb_regs.h.

#define USBB_UECON_EPDISHDMA (1 << 16)

Int stops DMA.

Definition at line 143 of file usbb_regs.h.

#define USBB_UECON_FIFOCON (1 << 14)

FIFO control.

Definition at line 142 of file usbb_regs.h.

#define USBB_UECON_KILLBK (1 << 13)

Free last IN bank.

Definition at line 141 of file usbb_regs.h.

#define USBB_UECON_MDATAE (1 << 8)

MDATA int enable.

Definition at line 138 of file usbb_regs.h.

#define USBB_UECON_NBUSYBKE (1 << 12)

Idle int enable.

Definition at line 140 of file usbb_regs.h.

#define USBB_UECON_NYETDIS (1 << 17)

Disable NYET.

Definition at line 144 of file usbb_regs.h.

#define USBB_UECON_RSTDT (1 << 18)

Reset Data Toggle.

Definition at line 145 of file usbb_regs.h.

Referenced by udc_ep_clear_halt().

#define USBB_UECON_STALLRQ (1 << 19)

Send STALL.

Definition at line 146 of file usbb_regs.h.

Referenced by udc_ep_clear_halt(), udc_ep_is_halted(), and udc_ep_set_halt().

#define USBB_UERST_EPEN | ( | x |  | ) | (1 << ((x) + 0))

Endpoint enable.

Definition at line 101 of file usbb_regs.h.

Referenced by udc_ep_destroy(), and usbb_udc_configure_ep().

#define USBB_UERST_EPRST | ( | x |  | ) | (1 << ((x) + 16))

Endpoint reset.

Definition at line 102 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UESTA_CFGOK (1 << 18)

Ep config OK.

Definition at line 132 of file usbb_regs.h.

Referenced by usbb_udc_configure_ep().

#define USBB_UESTA_CTRLDIR_IN (1 << 17)

Control direction.

Definition at line 131 of file usbb_regs.h.

#define USBB_UESTA_GET_BYCT | ( | x |  | ) | (((x) >> 20) & 0x7ff)

Byte count.

Definition at line 133 of file usbb_regs.h.

#define USBB_UESTA_GET_CURRBK | ( | x |  | ) | (((x) >> 14) & 3)

Current bank.

Definition at line 129 of file usbb_regs.h.

#define USBB_UESTA_GET_DTSEQ | ( | x |  | ) | (((x) >> 8) & 3)

Current data PID.

Definition at line 127 of file usbb_regs.h.

#define USBB_UESTA_GET_NBUSYBK | ( | x |  | ) | (((x) >> 12) & 3)

# busy banks

Definition at line 128 of file usbb_regs.h.

Referenced by udc_ep_set_halt().

#define USBB_UESTA_RWALL (1 << 16)

Read/write allowed.

Definition at line 130 of file usbb_regs.h.

#define USBB_USBCON_FRZCLK (1 << 14)

Freeze clock.

Definition at line 204 of file usbb_regs.h.

#define USBB_USBCON_HNPREQ (1 << 11)

HNP request.

Definition at line 201 of file usbb_regs.h.

#define USBB_USBCON_OTGPADE (1 << 12)

OTG pad enable.

Definition at line 202 of file usbb_regs.h.

Referenced by usbb_init().

#define USBB_USBCON_SRPREQ (1 << 10)

SRP request.

Definition at line 200 of file usbb_regs.h.

#define USBB_USBCON_SRPSEL (1 << 9)

SRP method.

Definition at line 199 of file usbb_regs.h.

#define USBB_USBCON_TIMPAGE | ( | x |  | ) | ((x) << 20)

Timer page.

Definition at line 207 of file usbb_regs.h.

#define USBB_USBCON_TIMVALUE | ( | x |  | ) | ((x) << 16)

Timer value.

Definition at line 206 of file usbb_regs.h.

#define USBB_USBCON_UIDE (1 << 24)

ID pin enable.

Definition at line 209 of file usbb_regs.h.

Referenced by usbb_init().

#define USBB_USBCON_UIMOD_DEVICE (1 << 25)

Device mode.

Definition at line 211 of file usbb_regs.h.

Referenced by usbb_init().

#define USBB_USBCON_UIMOD_HOST (0 << 25)

Host mode.

Definition at line 210 of file usbb_regs.h.

Referenced by usbb_init().

#define USBB_USBCON_UNLOCK (1 << 22)

Timer unlock.

Definition at line 208 of file usbb_regs.h.

#define USBB_USBCON_USBE (1 << 15)

Enable controller.

Definition at line 205 of file usbb_regs.h.

Referenced by usbb_init().

#define USBB_USBCON_VBUSHWC (1 << 8)

Vbus HW control.

Definition at line 198 of file usbb_regs.h.

#define USBB_USBCON_VBUSPO (1 << 13)

Vbus polarity.

Definition at line 203 of file usbb_regs.h.

#define USBB_USBSTA_CLKUSABLE (1 << 14)

UTMI clock OK.

Definition at line 223 of file usbb_regs.h.

#define USBB_USBSTA_ID (1 << 10)

ID pin state.

Definition at line 217 of file usbb_regs.h.

Referenced by usbb_check_id().

#define USBB_USBSTA_SPEED_FULL (0 << 12)

Full-speed.

Definition at line 220 of file usbb_regs.h.

Referenced by usbb_udc_softirq().

#define USBB_USBSTA_SPEED_HIGH (1 << 12)

High-speed.

Definition at line 221 of file usbb_regs.h.

Referenced by usbb_udc_softirq().

#define USBB_USBSTA_SPEED_LOW (2 << 12)

Low-speed.

Definition at line 222 of file usbb_regs.h.

Referenced by usbb_udc_softirq().

#define USBB_USBSTA_SPEED_MASK (3 << 12)

Bus connection.

Definition at line 219 of file usbb_regs.h.

Referenced by usbb_udc_softirq().

#define USBB_USBSTA_VBUS (1 << 11)

Vbus available.

Definition at line 218 of file usbb_regs.h.

#define USBB_USBSTA_VBUSRQ (1 << 9)

Vbus request.

Definition at line 216 of file usbb_regs.h.

#define USBB_VBERRI (1 << 3)

Vbus error.

Definition at line 230 of file usbb_regs.h.

#define USBB_VBUSTI (1 << 1)

Vbus transition.

Definition at line 228 of file usbb_regs.h.

Referenced by usbb_enter_device_mode(), and usbb_interrupt().