port.c File Reference


Detailed Description

FreeRTOS port source for AVR32 UC3.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file GCC/AVR32_UC3/port.c.

#include <malloc.h>
#include "nlao_cpu.h"
#include "nlao_usart.h"
#include "FreeRTOS.h"
#include "task.h"
#include <avr32/io.h>
#include "gpio.h"

Go to the source code of this file.

Defines

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )
#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )
#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Functions

void __malloc_lock (struct _reent *ptr)
void __malloc_unlock (struct _reent *ptr)
int _init_startup (void)
static void prvClearCcInt (void)
static void prvScheduleFirstTick (void)
static void prvSetupTimerInterrupt (void)
void * pvPortRealloc (void *pv, size_t xWantedSize)
portSTACK_TYPE * pxPortInitialiseStack (portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters)
void SCALLYield (void)
void vPortEndScheduler (void)
void vPortEnterCritical (void)
void vPortExitCritical (void)
static void vTick (void)
portBASE_TYPE xPortStartScheduler (void)

Variables

volatile unsigned portLONG ulCriticalNesting = 9999UL


Define Documentation

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )

Definition at line 78 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack().

#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )

Definition at line 79 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack().

#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Definition at line 82 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack(), and vPortExitCritical().


Function Documentation

void __malloc_lock ( struct _reent *  ptr  ) 

Definition at line 184 of file GCC/AVR32_UC3/port.c.

00185 {
00186     vTaskSuspendAll();
00187 }

void __malloc_unlock ( struct _reent *  ptr  ) 

Definition at line 194 of file GCC/AVR32_UC3/port.c.

00195 {
00196     xTaskResumeAll();
00197 }

int _init_startup ( void   ) 

Definition at line 105 of file GCC/AVR32_UC3/port.c.

References configCPU_CLOCK_HZ, and local_start_pll().

00106 {
00107     /* Import the Exception Vector Base Address. */
00108     extern void _evba;
00109 
00110     #if configHEAP_INIT
00111         extern void __heap_start__;
00112         extern void __heap_end__;
00113         portBASE_TYPE *pxMem;
00114     #endif
00115 
00116     /* Load the Exception Vector Base Address in the corresponding system register. */
00117     Set_system_register( AVR32_EVBA, ( int ) &_evba );
00118 
00119     /* Enable exceptions. */
00120     ENABLE_ALL_EXCEPTIONS();
00121 
00122     /* Initialize interrupt handling. */
00123     INTC_init_interrupts();
00124 
00125     #if configHEAP_INIT
00126 
00127         /* Initialize the heap used by malloc. */
00128         for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
00129         {
00130             *pxMem++ = 0xA5A5A5A5;
00131         }
00132 
00133     #endif
00134 
00135     /* Give the used CPU clock frequency to Newlib, so it can work properly. */
00136     set_cpu_hz( configCPU_CLOCK_HZ );
00137 
00138     /* Code section present if and only if the debug trace is activated. */
00139     #if configDBG
00140     {
00141         static const gpio_map_t DBG_USART_GPIO_MAP =
00142         {
00143             { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
00144             { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
00145         };
00146 
00147         /* Initialize the USART used for the debug trace with the configured parameters. */
00148         set_usart_base( ( void * ) configDBG_USART );
00149         gpio_enable_module( DBG_USART_GPIO_MAP,
00150                             sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
00151         usart_init( configDBG_USART_BAUDRATE );
00152     }
00153     #endif
00154 
00155     local_start_pll();
00156 
00157     // Don't-care value for GCC.
00158   return 1;
00159 }

static void prvClearCcInt ( void   )  [static]

Definition at line 347 of file GCC/AVR32_UC3/port.c.

Referenced by vTick().

00348     {
00349         Set_system_register(AVR32_COMPARE, Get_system_register(AVR32_COMPARE));
00350     }

static void prvScheduleFirstTick ( void   )  [static]

Definition at line 341 of file GCC/AVR32_UC3/port.c.

References configCPU_CLOCK_HZ, and configTICK_RATE_HZ.

Referenced by prvSetupTimerInterrupt().

00342     {
00343         Set_system_register(AVR32_COMPARE, configCPU_CLOCK_HZ/configTICK_RATE_HZ);
00344         Set_system_register(AVR32_COUNT, 0);
00345     }

static void prvSetupTimerInterrupt ( void   )  [static]

Definition at line 360 of file GCC/AVR32_UC3/port.c.

References configPBA_CLOCK_HZ, configTICK_RATE_HZ, configTICK_TC_CHANNEL, prvScheduleFirstTick(), and vTick().

Referenced by xPortStartScheduler().

00361 {
00362 #if( configTICK_USE_TC==1 )
00363 
00364     volatile avr32_tc_t *tc = &AVR32_TC;
00365 
00366     // Options for waveform genration.
00367     tc_waveform_opt_t waveform_opt =
00368     {
00369     .channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
00370 
00371     .bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
00372     .beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
00373     .bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
00374     .bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */
00375 
00376     .aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
00377     .aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
00378     .acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
00379     .acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
00380 
00381     .wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
00382     .enetrg   = FALSE,                             /* External event trigger enable. */
00383     .eevt     = 0,                                 /* External event selection. */
00384     .eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
00385     .cpcdis   = FALSE,                             /* Counter disable when RC compare. */
00386     .cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */
00387 
00388     .burst    = FALSE,                             /* Burst signal selection. */
00389     .clki     = FALSE,                             /* Clock inversion. */
00390     .tcclks   = TC_CLOCK_SOURCE_TC3                /* Internal source clock 3. */
00391     };
00392 
00393     tc_interrupt_t tc_interrupt =
00394     {
00395         .etrgs=0,
00396         .ldrbs=0,
00397         .ldras=0,
00398         .cpcs =1,
00399         .cpbs =0,
00400         .cpas =0,
00401         .lovrs=0,
00402         .covfs=0,
00403     };
00404 
00405 #endif
00406 
00407     /* Disable all interrupt/exception. */
00408     portDISABLE_INTERRUPTS();
00409 
00410     /* Register the compare interrupt handler to the interrupt controller and
00411     enable the compare interrupt. */
00412 
00413     #if( configTICK_USE_TC==1 )
00414     {
00415         INTC_register_interrupt(&vTick, configTICK_TC_IRQ, AVR32_INTC_INT0);
00416 
00417         /* Initialize the timer/counter. */
00418         tc_init_waveform(tc, &waveform_opt);
00419 
00420         /* Set the compare triggers.
00421         Remember TC counter is 16-bits, so counting second is not possible!
00422         That's why we configure it to count ms. Set Rc to the right value with
00423       rounding.*/
00424         tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ + 4 * configTICK_RATE_HZ ) /
00425                                                 ( 8 * configTICK_RATE_HZ ) );
00426 
00427         tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
00428 
00429         /* Start the timer/counter. */
00430         tc_start(tc, configTICK_TC_CHANNEL);
00431     }
00432     #else
00433     {
00434         INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT0);
00435         prvScheduleFirstTick();
00436     }
00437     #endif
00438 }

void* pvPortRealloc ( void *  pv,
size_t  xWantedSize 
)

Definition at line 201 of file GCC/AVR32_UC3/port.c.

00202 {
00203 void *pvReturn;
00204 
00205     vTaskSuspendAll();
00206     {
00207         pvReturn = realloc( pv, xWantedSize );
00208     }
00209     xTaskResumeAll();
00210 
00211     return pvReturn;
00212 }

portSTACK_TYPE* pxPortInitialiseStack ( portSTACK_TYPE *  pxTopOfStack,
pdTASK_CODE  pxCode,
void *  pvParameters 
)

Definition at line 288 of file GCC/AVR32_UC3/port.c.

References portINITIAL_SR, portINSTRUCTION_SIZE, and portNO_CRITICAL_NESTING.

00289 {
00290     /* Setup the initial stack of the task.  The stack is set exactly as
00291     expected by the portRESTORE_CONTEXT() macro. */
00292 
00293     /* When the task starts, it will expect to find the function parameter in R12. */
00294     pxTopOfStack--;
00295     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808;                    /* R8 */
00296     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909;                    /* R9 */
00297     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A;                    /* R10 */
00298     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B;                    /* R11 */
00299     *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters;                  /* R12 */
00300     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF;                    /* R14/LR */
00301     *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
00302     *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR;                /* SR */
00303     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF;                    /* R0 */
00304     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101;                    /* R1 */
00305     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202;                    /* R2 */
00306     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303;                    /* R3 */
00307     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404;                    /* R4 */
00308     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505;                    /* R5 */
00309     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606;                    /* R6 */
00310     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707;                    /* R7 */
00311     *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING;         /* ulCriticalNesting */
00312 
00313     return pxTopOfStack;
00314 }

void SCALLYield ( void   ) 

Definition at line 243 of file GCC/AVR32_UC3/port.c.

00244 {
00245     /* Save the context of the interrupted task. */
00246     portSAVE_CONTEXT_SCALL();
00247     vTaskSwitchContext();
00248     portRESTORE_CONTEXT_SCALL();
00249 }

void vPortEndScheduler ( void   ) 

Definition at line 331 of file GCC/AVR32_UC3/port.c.

00332 {
00333     /* It is unlikely that the AVR32 port will require this function as there
00334     is nothing to return to.  */
00335 }

void vPortEnterCritical ( void   ) 

Definition at line 256 of file GCC/AVR32_UC3/port.c.

References ulCriticalNesting.

Referenced by sys_arch_protect().

00257 {
00258     /* Disable interrupts */
00259     portDISABLE_INTERRUPTS();
00260 
00261     /* Now interrupts are disabled ulCriticalNesting can be accessed
00262      directly.  Increment ulCriticalNesting to keep a count of how many times
00263      portENTER_CRITICAL() has been called. */
00264     ulCriticalNesting++;
00265 }

void vPortExitCritical ( void   ) 

Definition at line 268 of file GCC/AVR32_UC3/port.c.

References portNO_CRITICAL_NESTING, and ulCriticalNesting.

Referenced by sys_arch_unprotect().

00269 {
00270     if(ulCriticalNesting > portNO_CRITICAL_NESTING)
00271     {
00272         ulCriticalNesting--;
00273         if( ulCriticalNesting == portNO_CRITICAL_NESTING )
00274         {
00275             /* Enable all interrupt/exception. */
00276             portENABLE_INTERRUPTS();
00277         }
00278     }
00279 }

static void vTick ( void   )  [static]

Definition at line 219 of file GCC/AVR32_UC3/port.c.

References prvClearCcInt().

Referenced by prvSetupTimerInterrupt().

00220 {
00221     /* Save the context of the interrupted task. */
00222     portSAVE_CONTEXT_OS_INT();
00223 
00224     #if( configTICK_USE_TC==1 )
00225         /* Clear the interrupt flag. */
00226         prvClearTcInt();
00227     #else
00228         /* Clear the interrupt flag. */
00229         prvClearCcInt();
00230     #endif
00231 
00232     /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
00233     calls in a critical section . */
00234     portENTER_CRITICAL();
00235         vTaskIncrementTick();
00236     portEXIT_CRITICAL();
00237 
00238     /* Restore the context of the "elected task". */
00239     portRESTORE_CONTEXT_OS_INT();
00240 }

portBASE_TYPE xPortStartScheduler ( void   ) 

Definition at line 317 of file GCC/AVR32_UC3/port.c.

References prvSetupTimerInterrupt().

00318 {
00319     /* Start the timer that generates the tick ISR.  Interrupts are disabled
00320     here already. */
00321     prvSetupTimerInterrupt();
00322 
00323     /* Start the first task. */
00324     portRESTORE_CONTEXT();
00325 
00326     /* Should not get here! */
00327     return 0;
00328 }


Variable Documentation

volatile unsigned portLONG ulCriticalNesting = 9999UL

Definition at line 83 of file GCC/AVR32_UC3/port.c.

Referenced by vPortEnterCritical(), and vPortExitCritical().


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