00001 /*This file has been prepared for Doxygen automatic documentation generation.*/ 00015 /* Copyright (c) 2009 Atmel Corporation. All rights reserved. 00016 * 00017 * Redistribution and use in source and binary forms, with or without 00018 * modification, are permitted provided that the following conditions are met: 00019 * 00020 * 1. Redistributions of source code must retain the above copyright notice, this 00021 * list of conditions and the following disclaimer. 00022 * 00023 * 2. Redistributions in binary form must reproduce the above copyright notice, 00024 * this list of conditions and the following disclaimer in the documentation 00025 * and/or other materials provided with the distribution. 00026 * 00027 * 3. The name of Atmel may not be used to endorse or promote products derived 00028 * from this software without specific prior written permission. 00029 * 00030 * 4. This software may only be redistributed and used in connection with an Atmel 00031 * AVR product. 00032 * 00033 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 00034 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00035 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00036 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 00037 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00038 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00039 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00040 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00041 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00042 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 00043 * 00044 */ 00045 /* Environment include files. */ 00046 #include <stdlib.h> 00047 #include <string.h> 00048 #include <stdarg.h> 00049 #include <stdio.h> 00050 #include "pm.h" 00051 #include "flashc.h" 00052 #include "sdramc.h" 00053 00054 /* Scheduler include files. */ 00055 #include "FreeRTOS.h" 00056 #include "task.h" 00057 00058 /* Demo file headers. */ 00059 #include "partest.h" 00060 #include "serial.h" 00061 #include "ethernet.h" 00062 #include "netif/etharp.h" 00063 #include "flash.h" 00064 #include "gpio.h" 00065 #include "print_funcs.h" 00066 00067 /* Priority definitions for most of the tasks in the demo application. */ 00068 #define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) 00069 #define mainETH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) 00070 00071 /* Baud rate used by the serial port tasks. */ 00072 #define mainCOM_BAUD_RATE ( ( unsigned portLONG ) 57600 ) 00073 #define mainCOM_BUFFER_LEN ( ( unsigned portLONG ) 70 ) 00074 00075 /* An address in the internal Flash used to count resets. This is used to check that 00076 the demo application is not unexpectedly resetting. */ 00077 #define mainRESET_COUNT_ADDRESS ( ( void * ) 0xC0000000 ) 00078 00087 void print_lwip_dbg(const char *format, ...) { 00088 va_list argp; 00089 static char str[80]; 00090 00091 va_start(argp, format); 00092 sprintf(str, format, argp); 00093 va_end(argp); 00094 00095 print_dbg(str); 00096 print_dbg("\n"); 00097 } 00098 00106 void local_start_pll(void) { 00107 00108 volatile avr32_pm_t *pm = &AVR32_PM; 00109 00110 // Switch the main clock to OSC0 00111 pm_switch_to_osc0(pm, FOSC0, OSC0_STARTUP); 00112 // Setup PLL0 on OSC0, mul=15 ,no divisor, lockcount=16, ie. 12Mhz x 11 = 132MHz output 00113 pm_pll_setup(pm, // volatile avr32_pm_t *pm 00114 0, // unsigned int pll 00115 10, // unsigned int mul 00116 1, // unsigned int div, Sel Osc0/PLL0 or Osc1/Pll1 00117 0, // unsigned int osc 00118 16);// unsigned int lockcount 00119 00120 00121 // set PLL options to run @ 96 Mhz 00122 pm_pll_set_option(pm, // volatile avr32_pm_t *pm 00123 0, // unsigned int pll 00124 1, // unsigned int pll_freq 00125 1, // unsigned int pll_div2 00126 0); // unsigned int pll_wbwdisable 00127 // Enable PLL0 00128 pm_pll_enable(pm, 0); 00129 // Wait for PLL0 locked 00130 pm_wait_for_pll0_locked(pm) ; 00131 // Setup generic clock number 0 on PLL, with OSC0/PLL0, no divisor 00132 pm_gc_setup(pm, 0, 1, // Use Osc (=0) or PLL (=1) 00133 0, // Sel Osc0/PLL0 or Osc1/Pll1 00134 0, 0); 00135 00136 // Enable Generic clock 0*/ 00137 pm_gc_enable(pm, 0); 00138 00139 // set divider to 8 for PBA bus and 2 for PBB 0 for CPU 00140 pm_cksel(pm, 1, 1, 1, 0, 0, 0); 00141 00142 // one wait state at 66 Mhz 00143 flashc_set_wait_state(1); 00144 /* Output the clock to a gpio(PA7) */ 00145 gpio_enable_module_pin(AVR32_PM_GCLK_0_0_PIN, AVR32_PM_GCLK_0_0_FUNCTION); 00146 00147 // switch to clock 00148 pm_switch_to_clock(pm, AVR32_PM_MCCTRL_MCSEL_PLL0); 00149 00150 /* Initialize the SDRAM Controller and the external SDRAM chip. */ 00151 sdramc_init(66000000); 00152 00153 } 00154 00165 int main(void) { 00166 00167 /* Init rs232 with pba = FOSC0 */ 00168 init_dbg_rs232(66000000/4); 00169 print_dbg("Init Done\n"); 00170 00171 00172 /* Setup the LED's for output. */ 00173 vParTestInitialise(); 00174 00175 /* Start the flash tasks just to provide visual feedback that the demo is 00176 executing. */ 00177 vStartLEDFlashTasks( mainLED_TASK_PRIORITY); 00178 print_dbg("vStartLEDFlashTasks :Started\n"); 00179 00180 /* 2) Start the ethernet tasks launcher. */ 00181 vStartEthernetTaskLauncher(configMAX_PRIORITIES); 00182 print_dbg("vStartEthernetTaskLauncher :Started\n"); 00183 00184 /* 3) Start FreeRTOS. */ 00185 vTaskStartScheduler(); 00186 00187 /* Will only reach here if there was insufficient memory to create the idle task. */ 00188 00189 return 0; 00190 } 00191 /*-----------------------------------------------------------*/
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