pm.h

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00001 /* This header file is part of the ATMEL AT32UC3A-SoftwareFramework-1.1.1 Release */
00002 
00003 /*This file has been prepared for Doxygen automatic documentation generation.*/
00018 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00019  *
00020  * Redistribution and use in source and binary forms, with or without
00021  * modification, are permitted provided that the following conditions are met:
00022  *
00023  * 1. Redistributions of source code must retain the above copyright notice,
00024  * this list of conditions and the following disclaimer.
00025  *
00026  * 2. Redistributions in binary form must reproduce the above copyright notice,
00027  * this list of conditions and the following disclaimer in the documentation
00028  * and/or other materials provided with the distribution.
00029  *
00030  * 3. The name of ATMEL may not be used to endorse or promote products derived
00031  * from this software without specific prior written permission.
00032  *
00033  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00034  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00035  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00036  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00037  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00038  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00039  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00040  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00041  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00042  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00043  */
00044 
00045 
00046 #ifndef _PM_H_
00047 #define _PM_H_
00048 
00049 #include <avr32/io.h>
00050 #include "compiler.h"
00051 #include "preprocessor.h"
00052 
00053 
00064 #define SLEEP(mode)   {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
00065 
00066 
00074 #if __GNUC__
00075 __attribute__((__always_inline__))
00076 #endif
00077 extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
00078 {
00079   return pm->rcause;
00080 }
00081 
00082 
00087 extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
00088 
00089 
00095 extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
00096 
00097 
00103 extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
00104 
00105 
00110 extern void pm_disable_clk0(volatile avr32_pm_t *pm);
00111 
00112 
00118 extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
00119 
00120 
00125 extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
00126 
00127 
00132 extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
00133 
00134 
00140 extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
00141 
00142 
00148 extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
00149 
00150 
00155 extern void pm_disable_clk1(volatile avr32_pm_t *pm);
00156 
00157 
00163 extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
00164 
00165 
00170 extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
00171 
00172 
00177 extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
00178 
00179 
00184 extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
00185 
00186 
00192 extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
00193 
00194 
00199 extern void pm_disable_clk32(volatile avr32_pm_t *pm);
00200 
00201 
00207 extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
00208 
00209 
00214 extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
00215 
00216 
00217 //FIXME update this header -SM
00228 extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
00229 
00230 
00240 extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
00241 
00242 
00248 extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
00249 
00250 
00256 extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
00257 
00258 
00259 //FIXME update this header -SM
00269 extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
00270 
00271 
00272 //FIXME update this header -SM
00281 extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);
00282 
00283 
00284 //FIXME update this header -SM
00291 extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
00292 
00293 
00299 extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
00300 
00301 
00307 extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
00308 
00309 
00314 extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
00315 
00316 
00321 extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
00322 
00323 
00329 extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
00330 
00331 
00338 extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
00339 
00340 
00341 #endif  // _PM_H_

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