pm.c File Reference

Detailed Description

Power Manager driver.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file pm.c.

#include "pm.h"

Include dependency graph for pm.c:

Go to the source code of this file.

Data Structures

union  u_avr32_pm_bgcr_t
union  u_avr32_pm_bod_t
union  u_avr32_pm_cksel_t
union  u_avr32_pm_gcctrl_t
union  u_avr32_pm_icr_t
union  u_avr32_pm_idr_t
union  u_avr32_pm_ier_t
union  u_avr32_pm_mcctrl_t
union  u_avr32_pm_oscctrl0_t
union  u_avr32_pm_oscctrl1_t
union  u_avr32_pm_oscctrl32_t
union  u_avr32_pm_pll_t
union  u_avr32_pm_rccr_t
union  u_avr32_pm_vregcr_t

Functions

void pm_bod_clear_irq (volatile avr32_pm_t *pm)
void pm_bod_disable_irq (volatile avr32_pm_t *pm)
void pm_bod_enable_irq (volatile avr32_pm_t *pm)
unsigned long pm_bod_get_irq_enable_bit (volatile avr32_pm_t *pm)
unsigned long pm_bod_get_irq_status (volatile avr32_pm_t *pm)
unsigned long pm_bod_get_level (volatile avr32_pm_t *pm)
void pm_cksel (volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel)
 This function will select all the power manager clocks.
void pm_disable_clk0 (volatile avr32_pm_t *pm)
 This function will disable the oscillator 0.
void pm_disable_clk1 (volatile avr32_pm_t *pm)
 This function will disable the oscillator 1.
void pm_disable_clk32 (volatile avr32_pm_t *pm)
 This function will disable the oscillator 32.
void pm_enable_clk0 (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 0 to be used with a startup time.
void pm_enable_clk0_no_wait (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 0 to be used with no startup time.
void pm_enable_clk1 (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 1 to be used with a startup time.
void pm_enable_clk1_no_wait (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 1 to be used with no startup time.
void pm_enable_clk32 (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 32 to be used with a startup time.
void pm_enable_clk32_no_wait (volatile avr32_pm_t *pm, unsigned int startup)
 This function will enable the oscillator 32 to be used with no startup time.
void pm_enable_osc0_crystal (volatile avr32_pm_t *pm, unsigned int fosc0)
 This function will enable the crystal mode of the oscillator 0.
void pm_enable_osc0_ext_clock (volatile avr32_pm_t *pm)
 This function will enable the external clock mode of the oscillator 0.
void pm_enable_osc1_crystal (volatile avr32_pm_t *pm, unsigned int fosc1)
 This function will enable the crystal mode of the oscillator 1.
void pm_enable_osc1_ext_clock (volatile avr32_pm_t *pm)
 This function will enable the external clock mode of the oscillator 1.
void pm_enable_osc32_crystal (volatile avr32_pm_t *pm)
 This function will enable the crystal mode of the 32-kHz oscillator.
void pm_enable_osc32_ext_clock (volatile avr32_pm_t *pm)
 This function will enable the external clock mode of the 32-kHz oscillator.
void pm_gc_disable (volatile avr32_pm_t *pm, unsigned int gc)
 This function will disable a generic clock.
void pm_gc_enable (volatile avr32_pm_t *pm, unsigned int gc)
 This function will enable a generic clock.
void pm_gc_setup (volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div)
 This function will setup a generic clock.
void pm_pll_disable (volatile avr32_pm_t *pm, unsigned int pll)
 This function will disable a PLL.
void pm_pll_enable (volatile avr32_pm_t *pm, unsigned int pll)
 This function will enable a PLL.
unsigned int pm_pll_get_option (volatile avr32_pm_t *pm, unsigned int pll)
 This function will get a PLL option.
void pm_pll_set_option (volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable)
 This function will set a PLL option.
void pm_pll_setup (volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount)
 This function will setup a PLL.
unsigned long pm_read_gplp (volatile avr32_pm_t *pm, unsigned long gplp)
static void pm_set_osc0_mode (volatile avr32_pm_t *pm, unsigned int mode)
 Sets the mode of the oscillator 0.
static void pm_set_osc1_mode (volatile avr32_pm_t *pm, unsigned int mode)
 Sets the mode of the oscillator 1.
static void pm_set_osc32_mode (volatile avr32_pm_t *pm, unsigned int mode)
 Sets the mode of the 32-kHz oscillator.
void pm_switch_to_clock (volatile avr32_pm_t *pm, unsigned long clock)
 This function will switch the power manager main clock.
void pm_switch_to_osc0 (volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
 Switch main clock to clock Osc0 (crystal mode).
void pm_wait_for_clk0_ready (volatile avr32_pm_t *pm)
 This function will wait until the Osc0 clock is ready.
void pm_wait_for_clk1_ready (volatile avr32_pm_t *pm)
 This function will wait until the Osc1 clock is ready.
void pm_wait_for_clk32_ready (volatile avr32_pm_t *pm)
 This function will wait until the osc32 clock is ready.
void pm_wait_for_pll0_locked (volatile avr32_pm_t *pm)
 This function will wait for PLL0 locked.
void pm_wait_for_pll1_locked (volatile avr32_pm_t *pm)
 This function will wait for PLL1 locked.
void pm_write_gplp (volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)

Function Documentation

void pm_bod_clear_irq ( volatile avr32_pm_t *  pm  ) 

Definition at line 479 of file pm.c.

00480 {
00481   pm->icr = AVR32_PM_ICR_BODDET_MASK;
00482 }

void pm_bod_disable_irq ( volatile avr32_pm_t *  pm  ) 

Definition at line 473 of file pm.c.

00474 {
00475   pm->idr = AVR32_PM_IDR_BODDET_MASK;
00476 }

void pm_bod_enable_irq ( volatile avr32_pm_t *  pm  ) 

Definition at line 467 of file pm.c.

00468 {
00469   pm->ier = AVR32_PM_IER_BODDET_MASK;
00470 }

unsigned long pm_bod_get_irq_enable_bit ( volatile avr32_pm_t *  pm  ) 

Definition at line 491 of file pm.c.

00492 {
00493   return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
00494 }

unsigned long pm_bod_get_irq_status ( volatile avr32_pm_t *  pm  ) 

Definition at line 485 of file pm.c.

00486 {
00487   return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
00488 }

unsigned long pm_bod_get_level ( volatile avr32_pm_t *  pm  ) 

Definition at line 497 of file pm.c.

00498 {
00499   return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
00500 }

void pm_cksel ( volatile avr32_pm_t *  pm,
unsigned int  pbadiv,
unsigned int  pbasel,
unsigned int  pbbdiv,
unsigned int  pbbsel,
unsigned int  hsbdiv,
unsigned int  hsbsel 
)

This function will select all the power manager clocks.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pbadiv Peripheral Bus A clock divisor enable
pbasel Peripheral Bus A select
pbbdiv Peripheral Bus B clock divisor enable
pbbsel Peripheral Bus B select
hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
hsbsel High Speed Bus select (CPU clock = HSB clock )

Definition at line 321 of file pm.c.

References u_avr32_pm_cksel_t::cksel, and u_avr32_pm_cksel_t::CKSEL.

Referenced by main().

00328 {
00329   u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
00330 
00331   u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
00332   u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
00333   u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
00334   u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
00335   u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
00336   u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
00337   u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
00338   u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
00339 
00340   pm->cksel = u_avr32_pm_cksel.cksel;
00341 
00342   // Wait for ckrdy bit and then clear it
00343   while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
00344 }

void pm_disable_clk0 ( volatile avr32_pm_t *  pm  ) 

This function will disable the oscillator 0.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 176 of file pm.c.

00177 {
00178   pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
00179 }

void pm_disable_clk1 ( volatile avr32_pm_t *  pm  ) 

This function will disable the oscillator 1.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 237 of file pm.c.

00238 {
00239   pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
00240 }

void pm_disable_clk32 ( volatile avr32_pm_t *  pm  ) 

This function will disable the oscillator 32.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 297 of file pm.c.

00298 {
00299   pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
00300 }

void pm_enable_clk0 ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 0 to be used with a startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)

Definition at line 169 of file pm.c.

References pm_enable_clk0_no_wait(), and pm_wait_for_clk0_ready().

Referenced by pm_switch_to_osc0().

00170 {
00171   pm_enable_clk0_no_wait(pm, startup);
00172   pm_wait_for_clk0_ready(pm);
00173 }

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void pm_enable_clk0_no_wait ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 0 to be used with no startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.

Definition at line 182 of file pm.c.

References u_avr32_pm_oscctrl0_t::oscctrl0, and u_avr32_pm_oscctrl0_t::OSCCTRL0.

Referenced by pm_enable_clk0().

00183 {
00184   // Read register
00185   u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
00186   // Modify
00187   u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
00188   // Write back
00189   pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
00190 
00191   pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
00192 }

void pm_enable_clk1 ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 1 to be used with a startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value)

Definition at line 230 of file pm.c.

References pm_enable_clk1_no_wait(), and pm_wait_for_clk1_ready().

00231 {
00232   pm_enable_clk1_no_wait(pm, startup);
00233   pm_wait_for_clk1_ready(pm);
00234 }

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void pm_enable_clk1_no_wait ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 1 to be used with no startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.

Definition at line 243 of file pm.c.

References u_avr32_pm_oscctrl1_t::oscctrl1, and u_avr32_pm_oscctrl1_t::OSCCTRL1.

Referenced by pm_enable_clk1().

00244 {
00245   // Read register
00246   u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
00247   // Modify
00248   u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
00249   // Write back
00250   pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
00251 
00252   pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
00253 }

void pm_enable_clk32 ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 32 to be used with a startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value)

Definition at line 290 of file pm.c.

References pm_enable_clk32_no_wait(), and pm_wait_for_clk32_ready().

00291 {
00292   pm_enable_clk32_no_wait(pm, startup);
00293   pm_wait_for_clk32_ready(pm);
00294 }

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void pm_enable_clk32_no_wait ( volatile avr32_pm_t *  pm,
unsigned int  startup 
)

This function will enable the oscillator 32 to be used with no startup time.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.

Definition at line 303 of file pm.c.

References u_avr32_pm_oscctrl32_t::oscctrl32, and u_avr32_pm_oscctrl32_t::OSCCTRL32.

Referenced by pm_enable_clk32(), and rtc_init().

00304 {
00305   // Read register
00306   u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
00307   // Modify
00308   u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
00309   u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
00310   // Write back
00311   pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
00312 }

void pm_enable_osc0_crystal ( volatile avr32_pm_t *  pm,
unsigned int  fosc0 
)

This function will enable the crystal mode of the oscillator 0.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
fosc0 Oscillator 0 crystal frequency (Hz)

Definition at line 162 of file pm.c.

References pm_set_osc0_mode().

Referenced by pm_switch_to_osc0().

00163 {
00164   pm_set_osc0_mode(pm, (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
00165                                            AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
00166 }

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void pm_enable_osc0_ext_clock ( volatile avr32_pm_t *  pm  ) 

This function will enable the external clock mode of the oscillator 0.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 156 of file pm.c.

References pm_set_osc0_mode().

00157 {
00158   pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
00159 }

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void pm_enable_osc1_crystal ( volatile avr32_pm_t *  pm,
unsigned int  fosc1 
)

This function will enable the crystal mode of the oscillator 1.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
fosc1 Oscillator 1 crystal frequency (Hz)

Definition at line 223 of file pm.c.

References pm_set_osc1_mode().

00224 {
00225   pm_set_osc1_mode(pm, (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
00226                                            AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
00227 }

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void pm_enable_osc1_ext_clock ( volatile avr32_pm_t *  pm  ) 

This function will enable the external clock mode of the oscillator 1.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 217 of file pm.c.

References pm_set_osc1_mode().

00218 {
00219   pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
00220 }

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void pm_enable_osc32_crystal ( volatile avr32_pm_t *  pm  ) 

This function will enable the crystal mode of the 32-kHz oscillator.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 284 of file pm.c.

References pm_set_osc32_mode().

Referenced by rtc_init().

00285 {
00286   pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
00287 }

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void pm_enable_osc32_ext_clock ( volatile avr32_pm_t *  pm  ) 

This function will enable the external clock mode of the 32-kHz oscillator.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 278 of file pm.c.

References pm_set_osc32_mode().

00279 {
00280   pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
00281 }

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void pm_gc_disable ( volatile avr32_pm_t *  pm,
unsigned int  gc 
)

This function will disable a generic clock.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
gc generic clock number (0 for gc0...)

Definition at line 372 of file pm.c.

00374 {
00375   pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
00376 }

void pm_gc_enable ( volatile avr32_pm_t *  pm,
unsigned int  gc 
)

This function will enable a generic clock.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
gc generic clock number (0 for gc0...)

Definition at line 365 of file pm.c.

00367 {
00368   pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
00369 }

void pm_gc_setup ( volatile avr32_pm_t *  pm,
unsigned int  gc,
unsigned int  osc_or_pll,
unsigned int  pll_osc,
unsigned int  diven,
unsigned int  div 
)

This function will setup a generic clock.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
gc generic clock number (0 for gc0...)
osc_or_pll Use OSC (=0) or PLL (=1)
pll_osc Select Osc0/PLL0 or Osc1/PLL1
diven Generic clock divisor enable
div Generic clock divisor

Definition at line 347 of file pm.c.

References u_avr32_pm_gcctrl_t::gcctrl, and u_avr32_pm_gcctrl_t::GCCTRL.

00353 {
00354   u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
00355 
00356   u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
00357   u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
00358   u_avr32_pm_gcctrl.GCCTRL.diven  = diven;
00359   u_avr32_pm_gcctrl.GCCTRL.div    = div;
00360 
00361   pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
00362 }

void pm_pll_disable ( volatile avr32_pm_t *  pm,
unsigned int  pll 
)

This function will disable a PLL.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pll PLL number(0 for PLL0, 1 for PLL1)

Definition at line 423 of file pm.c.

00425 {
00426   pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
00427 }

void pm_pll_enable ( volatile avr32_pm_t *  pm,
unsigned int  pll 
)

This function will enable a PLL.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pll PLL number(0 for PLL0, 1 for PLL1)

Definition at line 416 of file pm.c.

00418 {
00419   pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
00420 }

unsigned int pm_pll_get_option ( volatile avr32_pm_t *  pm,
unsigned int  pll 
)

This function will get a PLL option.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pll PLL number(0 for PLL0, 1 for PLL1)
Returns:
Option

Definition at line 409 of file pm.c.

00411 {
00412   return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
00413 }

void pm_pll_set_option ( volatile avr32_pm_t *  pm,
unsigned int  pll,
unsigned int  pll_freq,
unsigned int  pll_div2,
unsigned int  pll_wbwdisable 
)

This function will set a PLL option.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pll PLL number(0 for PLL0, 1 for PLL1)
pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.

Definition at line 397 of file pm.c.

References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.

00402 {
00403   u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
00404   u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
00405   pm->pll[pll] = u_avr32_pm_pll.pll;
00406 }

void pm_pll_setup ( volatile avr32_pm_t *  pm,
unsigned int  pll,
unsigned int  mul,
unsigned int  div,
unsigned int  osc,
unsigned int  lockcount 
)

This function will setup a PLL.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
pll PLL number(0 for PLL0, 1 for PLL1)
mul 
div 
osc 
lockcount 

Definition at line 379 of file pm.c.

References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.

00385 {
00386   u_avr32_pm_pll_t u_avr32_pm_pll = {0};
00387 
00388   u_avr32_pm_pll.PLL.pllosc   = osc;
00389   u_avr32_pm_pll.PLL.plldiv   = div;
00390   u_avr32_pm_pll.PLL.pllmul   = mul;
00391   u_avr32_pm_pll.PLL.pllcount = lockcount;
00392 
00393   pm->pll[pll] = u_avr32_pm_pll.pll;
00394 }

unsigned long pm_read_gplp ( volatile avr32_pm_t *  pm,
unsigned long  gplp 
)

Definition at line 509 of file pm.c.

00510 {
00511   return pm->gplp[gplp];
00512 }

static void pm_set_osc0_mode ( volatile avr32_pm_t *  pm,
unsigned int  mode 
) [static]

Sets the mode of the oscillator 0.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM).
mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).

Definition at line 145 of file pm.c.

References u_avr32_pm_oscctrl0_t::oscctrl0, and u_avr32_pm_oscctrl0_t::OSCCTRL0.

Referenced by pm_enable_osc0_crystal(), and pm_enable_osc0_ext_clock().

00146 {
00147   // Read
00148   u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
00149   // Modify
00150   u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
00151   // Write
00152   pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
00153 }

static void pm_set_osc1_mode ( volatile avr32_pm_t *  pm,
unsigned int  mode 
) [static]

Sets the mode of the oscillator 1.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM).
mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).

Definition at line 206 of file pm.c.

References u_avr32_pm_oscctrl1_t::oscctrl1, and u_avr32_pm_oscctrl1_t::OSCCTRL1.

Referenced by pm_enable_osc1_crystal(), and pm_enable_osc1_ext_clock().

00207 {
00208   // Read
00209   u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
00210   // Modify
00211   u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
00212   // Write
00213   pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
00214 }

static void pm_set_osc32_mode ( volatile avr32_pm_t *  pm,
unsigned int  mode 
) [static]

Sets the mode of the 32-kHz oscillator.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM).
mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).

Definition at line 267 of file pm.c.

References u_avr32_pm_oscctrl32_t::oscctrl32, and u_avr32_pm_oscctrl32_t::OSCCTRL32.

Referenced by pm_enable_osc32_crystal(), and pm_enable_osc32_ext_clock().

00268 {
00269   // Read
00270   u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
00271   // Modify
00272   u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
00273   // Write
00274   pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
00275 }

void pm_switch_to_clock ( volatile avr32_pm_t *  pm,
unsigned long  clock 
)

This function will switch the power manager main clock.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.

Definition at line 448 of file pm.c.

References u_avr32_pm_mcctrl_t::mcctrl, and u_avr32_pm_mcctrl_t::MCCTRL.

Referenced by pm_switch_to_osc0().

00449 {
00450   // Read
00451   u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
00452   // Modify
00453   u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
00454   // Write back
00455   pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
00456 }

void pm_switch_to_osc0 ( volatile avr32_pm_t *  pm,
unsigned int  fosc0,
unsigned int  startup 
)

Switch main clock to clock Osc0 (crystal mode).

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)
fosc0 Oscillator 0 crystal frequency (Hz)
startup Crystal 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)

Definition at line 459 of file pm.c.

References pm_enable_clk0(), pm_enable_osc0_crystal(), and pm_switch_to_clock().

Referenced by main().

00460 {
00461   pm_enable_osc0_crystal(pm, fosc0);            // Enable the Osc0 in crystal mode
00462   pm_enable_clk0(pm, startup);                  // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
00463   pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0);  // Then switch main clock to Osc0
00464 }

Here is the call graph for this function:

void pm_wait_for_clk0_ready ( volatile avr32_pm_t *  pm  ) 

This function will wait until the Osc0 clock is ready.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 195 of file pm.c.

Referenced by pm_enable_clk0().

00196 {
00197   while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
00198 }

void pm_wait_for_clk1_ready ( volatile avr32_pm_t *  pm  ) 

This function will wait until the Osc1 clock is ready.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 256 of file pm.c.

Referenced by pm_enable_clk1().

00257 {
00258   while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
00259 }

void pm_wait_for_clk32_ready ( volatile avr32_pm_t *  pm  ) 

This function will wait until the osc32 clock is ready.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 315 of file pm.c.

Referenced by pm_enable_clk32().

00316 {
00317   while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
00318 }

void pm_wait_for_pll0_locked ( volatile avr32_pm_t *  pm  ) 

This function will wait for PLL0 locked.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 430 of file pm.c.

00431 {
00432   while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
00433 
00434   // Bypass the lock signal of the PLL
00435   pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK;
00436 }

void pm_wait_for_pll1_locked ( volatile avr32_pm_t *  pm  ) 

This function will wait for PLL1 locked.

Parameters:
pm Base address of the Power Manager (i.e. &AVR32_PM)

Definition at line 439 of file pm.c.

00440 {
00441   while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
00442 
00443   // Bypass the lock signal of the PLL
00444   pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK;
00445 }

void pm_write_gplp ( volatile avr32_pm_t *  pm,
unsigned long  gplp,
unsigned long  value 
)

Definition at line 503 of file pm.c.

00504 {
00505   pm->gplp[gplp] = value;
00506 }

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