00001 /* This header file is part of the ATMEL AT32UC3A-SoftwareFramework-1.1.1 Release */ 00002 00003 /*This file has been prepared for Doxygen automatic documentation generation.*/ 00019 /* Copyright (c) 2007, Atmel Corporation All rights reserved. 00020 * 00021 * Redistribution and use in source and binary forms, with or without 00022 * modification, are permitted provided that the following conditions are met: 00023 * 00024 * 1. Redistributions of source code must retain the above copyright notice, 00025 * this list of conditions and the following disclaimer. 00026 * 00027 * 2. Redistributions in binary form must reproduce the above copyright notice, 00028 * this list of conditions and the following disclaimer in the documentation 00029 * and/or other materials provided with the distribution. 00030 * 00031 * 3. The name of ATMEL may not be used to endorse or promote products derived 00032 * from this software without specific prior written permission. 00033 * 00034 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED 00035 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00036 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND 00037 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, 00038 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00039 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00040 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00041 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00042 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 00043 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00044 */ 00045 00046 00047 #ifndef _GPIO_H_ 00048 #define _GPIO_H_ 00049 00050 #include <avr32/io.h> 00051 00052 00055 00056 #define GPIO_SUCCESS 0 00057 #define GPIO_INVALID_ARGUMENT 1 00058 00059 00060 00063 00064 #define GPIO_PIN_CHANGE 0 00065 #define GPIO_RISING_EDGE 1 00066 #define GPIO_FALLING_EDGE 2 00067 00068 00069 00071 typedef struct 00072 { 00073 unsigned char pin; 00074 unsigned char function; 00075 } gpio_map_t[]; 00076 00077 00085 extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size); 00086 00102 extern int gpio_enable_module_pin(unsigned int pin, unsigned int function); 00103 00109 extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size); 00110 00120 extern void gpio_enable_gpio_pin(unsigned int pin); 00121 00126 extern void gpio_enable_pin_open_drain(unsigned int pin); 00127 00132 extern void gpio_disable_pin_open_drain(unsigned int pin); 00133 00138 extern void gpio_enable_pin_pull_up(unsigned int pin); 00139 00144 extern void gpio_disable_pin_pull_up(unsigned int pin); 00145 00152 extern int gpio_get_pin_value(unsigned int pin); 00153 00160 extern int gpio_get_gpio_pin_output_value(unsigned int pin); 00161 00166 extern void gpio_set_gpio_pin(unsigned int pin); 00167 00172 extern void gpio_clr_gpio_pin(unsigned int pin); 00173 00178 extern void gpio_tgl_gpio_pin(unsigned int pin); 00179 00193 extern void gpio_enable_pin_glitch_filter(unsigned int pin); 00194 00199 extern void gpio_disable_pin_glitch_filter(unsigned int pin); 00200 00209 extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode); 00210 00215 extern void gpio_disable_pin_interrupt(unsigned int pin); 00216 00223 extern int gpio_get_pin_interrupt_flag(unsigned int pin); 00224 00229 extern void gpio_clear_pin_interrupt_flag(unsigned int pin); 00230 00231 00232 #endif // _GPIO_H_
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