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00047 #ifndef _COMPILER_H_
00048 #define _COMPILER_H_
00049
00050 #include <avr32/io.h>
00051 #if __ICCAVR32__
00052 # include <intrinsics.h>
00053 #endif
00054 #include "preprocessor.h"
00055
00056
00057
00058
00059 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
00060
00061 #include <stddef.h>
00062 #include <stdlib.h>
00063
00064
00065 #if __ICCAVR32__
00066
00071
00072 #define __asm__ asm
00073 #define __inline__ inline
00074 #define __volatile__
00076
00077 #endif
00078
00079
00082
00083 typedef unsigned char Bool;
00084 typedef unsigned char U8 ;
00085 typedef unsigned short int U16;
00086 typedef unsigned long int U32;
00087 typedef unsigned long long int U64;
00088 typedef signed char S8 ;
00089 typedef signed short int S16;
00090 typedef signed long int S32;
00091 typedef signed long long int S64;
00092 typedef float F32;
00093 typedef double F64;
00094
00095
00096
00099
00100 typedef Bool Status_bool_t;
00101 typedef U8 Status_t;
00102
00103
00104
00107
00108
00110 typedef union
00111 {
00112 U16 u16 ;
00113 U8 u8 [2];
00114 } Union16;
00115
00117 typedef union
00118 {
00119 U32 u32 ;
00120 U16 u16[2];
00121 U8 u8 [4];
00122 } Union32;
00123
00125 typedef union
00126 {
00127 U64 u64 ;
00128 U32 u32[2];
00129 U16 u16[4];
00130 U8 u8 [8];
00131 } Union64;
00132
00134 typedef union
00135 {
00136 U64 *u64ptr;
00137 U32 *u32ptr;
00138 U16 *u16ptr;
00139 U8 *u8ptr ;
00140 } UnionPtr;
00141
00143 typedef union
00144 {
00145 volatile U64 *u64ptr;
00146 volatile U32 *u32ptr;
00147 volatile U16 *u16ptr;
00148 volatile U8 *u8ptr ;
00149 } UnionVPtr;
00150
00152 typedef union
00153 {
00154 const U64 *u64ptr;
00155 const U32 *u32ptr;
00156 const U16 *u16ptr;
00157 const U8 *u8ptr ;
00158 } UnionCPtr;
00159
00161 typedef union
00162 {
00163 const volatile U64 *u64ptr;
00164 const volatile U32 *u32ptr;
00165 const volatile U16 *u16ptr;
00166 const volatile U8 *u8ptr ;
00167 } UnionCVPtr;
00168
00170 typedef struct
00171 {
00172 U64 *u64ptr;
00173 U32 *u32ptr;
00174 U16 *u16ptr;
00175 U8 *u8ptr ;
00176 } StructPtr;
00177
00179 typedef struct
00180 {
00181 volatile U64 *u64ptr;
00182 volatile U32 *u32ptr;
00183 volatile U16 *u16ptr;
00184 volatile U8 *u8ptr ;
00185 } StructVPtr;
00186
00188 typedef struct
00189 {
00190 const U64 *u64ptr;
00191 const U32 *u32ptr;
00192 const U16 *u16ptr;
00193 const U8 *u8ptr ;
00194 } StructCPtr;
00195
00197 typedef struct
00198 {
00199 const volatile U64 *u64ptr;
00200 const volatile U32 *u32ptr;
00201 const volatile U16 *u16ptr;
00202 const volatile U8 *u8ptr ;
00203 } StructCVPtr;
00204
00206
00207 #endif // __AVR32_ABI_COMPILER__
00208
00209
00210
00211
00214
00215 #define DISABLE 0
00216 #define ENABLE 1
00217 #define DISABLED 0
00218 #define ENABLED 1
00219 #define OFF 0
00220 #define ON 1
00221 #define FALSE 0
00222 #define TRUE 1
00223 #define KO 0
00224 #define OK 1
00225 #define PASS 0
00226 #define FAIL 1
00227 #define LOW 0
00228 #define HIGH 1
00229 #define CLR 0
00230 #define SET 1
00232
00233
00234 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
00235
00238
00239
00247 #define Rd_bits( value, mask) ((value) & (mask))
00248
00257 #define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\
00258 ((bits ) & (mask)))
00259
00267 #define Tst_bits( value, mask) (Rd_bits(value, mask) != 0)
00268
00276 #define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask))
00277
00285 #define Set_bits(lvalue, mask) ((lvalue) |= (mask))
00286
00294 #define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask))
00295
00303 #define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask))
00304
00313 #define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))
00314
00316
00317
00325 #ifdef _ASSERT_ENABLE_
00326 #define Assert(expr) \
00327 {\
00328 if (!(expr)) while (TRUE);\
00329 }
00330 #else
00331 #define Assert(expr)
00332 #endif
00333
00334
00347
00348
00355 #if __GNUC__
00356 #define clz(u) __builtin_clz(u)
00357 #elif __ICCAVR32__
00358 #define clz(u) __count_leading_zeros(u)
00359 #endif
00360
00367 #if __GNUC__
00368 #define ctz(u) __builtin_ctz(u)
00369 #elif __ICCAVR32__
00370 #define ctz(u) __count_trailing_zeros(u)
00371 #endif
00372
00374
00375
00378
00379
00387 #define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) )
00388
00396 #define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) )
00397
00406 #define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) )
00407
00415 #define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1))
00416
00424 #define Align_down(val, n ) ( (val) & ~((n) - 1))
00425
00427
00428
00440
00441
00450 #define Abs(a) (((a) < 0 ) ? -(a) : (a))
00451
00461 #define Min(a, b) (((a) < (b)) ? (a) : (b))
00462
00472 #define Max(a, b) (((a) > (b)) ? (a) : (b))
00473
00482 #if __GNUC__
00483 #define abs(a) \
00484 (\
00485 {\
00486 int __value = (a);\
00487 __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\
00488 __value;\
00489 }\
00490 )
00491 #elif __ICCAVR32__
00492 #define abs(a) Abs(a)
00493 #endif
00494
00504 #if __GNUC__
00505 #define min(a, b) \
00506 (\
00507 {\
00508 int __value, __arg_a = (a), __arg_b = (b);\
00509 __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
00510 __value;\
00511 }\
00512 )
00513 #elif __ICCAVR32__
00514 #define min(a, b) Min(a, b)
00515 #endif
00516
00526 #if __GNUC__
00527 #define max(a, b) \
00528 (\
00529 {\
00530 int __value, __arg_a = (a), __arg_b = (b);\
00531 __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
00532 __value;\
00533 }\
00534 )
00535 #elif __ICCAVR32__
00536 #define max(a, b) Max(a, b)
00537 #endif
00538
00540
00541
00553 #define Long_call(addr) ((*(void (*)(void))(addr))())
00554
00559 #if __GNUC__
00560 #define Reset_CPU() \
00561 (\
00562 {\
00563 __asm__ __volatile__ (\
00564 "lddpc r9, 3f\n\t"\
00565 "mfsr r8, %[SR]\n\t"\
00566 "bfextu r8, r8, %[SR_MX_OFFSET], %[SR_MX_SIZE]\n\t"\
00567 "cp.w r8, 0b001\n\t"\
00568 "breq 0f\n\t"\
00569 "sub r8, pc, $ - 1f\n\t"\
00570 "pushm r8-r9\n\t"\
00571 "rete\n"\
00572 "0:\n\t"\
00573 "mtsr %[SR], r9\n"\
00574 "1:\n\t"\
00575 "mov r0, 0\n\t"\
00576 "mov r1, 0\n\t"\
00577 "mov r2, 0\n\t"\
00578 "mov r3, 0\n\t"\
00579 "mov r4, 0\n\t"\
00580 "mov r5, 0\n\t"\
00581 "mov r6, 0\n\t"\
00582 "mov r7, 0\n\t"\
00583 "mov r8, 0\n\t"\
00584 "mov r9, 0\n\t"\
00585 "mov r10, 0\n\t"\
00586 "mov r11, 0\n\t"\
00587 "mov r12, 0\n\t"\
00588 "mov sp, 0\n\t"\
00589 "stdsp sp[0], sp\n\t"\
00590 "ldmts sp, sp\n\t"\
00591 "mov lr, 0\n\t"\
00592 "lddpc pc, 2f\n\t"\
00593 ".balign 4\n"\
00594 "2:\n\t"\
00595 ".word _start\n"\
00596 "3:\n\t"\
00597 ".word %[RESET_SR]"\
00598 :\
00599 : [SR] "i" (AVR32_SR),\
00600 [SR_MX_OFFSET] "i" (AVR32_SR_M0_OFFSET),\
00601 [SR_MX_SIZE] "i" (AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE),\
00602 [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)\
00603 );\
00604 }\
00605 )
00606 #elif __ICCAVR32__
00607 #define Reset_CPU() \
00608 {\
00609 extern void *volatile __program_start;\
00610 __asm__ __volatile__ (\
00611 "mov r7, LWRD(__program_start)\n\t"\
00612 "orh r7, HWRD(__program_start)\n\t"\
00613 "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
00614 "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
00615 "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\
00616 "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M0_OFFSET)", "ASTRINGZ(AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE)"\n\t"\
00617 "cp.w r8, 001b\n\t"\
00618 "breq $ + 10\n\t"\
00619 "sub r8, pc, -12\n\t"\
00620 "pushm r8-r9\n\t"\
00621 "rete\n\t"\
00622 "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\
00623 "mov r0, 0\n\t"\
00624 "mov r1, 0\n\t"\
00625 "mov r2, 0\n\t"\
00626 "mov r3, 0\n\t"\
00627 "mov r4, 0\n\t"\
00628 "mov r5, 0\n\t"\
00629 "mov r6, 0\n\t"\
00630 "st.w r0[4], r7\n\t"\
00631 "mov r7, 0\n\t"\
00632 "mov r8, 0\n\t"\
00633 "mov r9, 0\n\t"\
00634 "mov r10, 0\n\t"\
00635 "mov r11, 0\n\t"\
00636 "mov r12, 0\n\t"\
00637 "mov sp, 0\n\t"\
00638 "stdsp sp[0], sp\n\t"\
00639 "ldmts sp, sp\n\t"\
00640 "mov lr, 0\n\t"\
00641 "ld.w pc, lr[4]"\
00642 );\
00643 __program_start;\
00644 }
00645 #endif
00646
00647
00650
00651
00658 #if __GNUC__
00659 #define Get_system_register(sysreg) __builtin_mfsr(sysreg)
00660 #elif __ICCAVR32__
00661 #define Get_system_register(sysreg) __get_system_register(sysreg)
00662 #endif
00663
00669 #if __GNUC__
00670 #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
00671 #elif __ICCAVR32__
00672 #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
00673 #endif
00674
00676
00677
00680
00681
00686 #define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
00687
00690 #if __GNUC__
00691 #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
00692 #elif __ICCAVR32__
00693 #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET))
00694 #endif
00695
00698 #if __GNUC__
00699 #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
00700 #elif __ICCAVR32__
00701 #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET))
00702 #endif
00703
00708 #define Is_global_interrupt_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
00709
00712 #if __GNUC__
00713 #define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (AVR32_SR_GM_OFFSET));})
00714 #elif __ICCAVR32__
00715 #define Disable_global_interrupt() {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(AVR32_SR_GM_OFFSET)"\n\tnop\n\tnop");}
00716 #endif
00717
00720 #if __GNUC__
00721 #define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));})
00722 #elif __ICCAVR32__
00723 #define Enable_global_interrupt() (__enable_interrupt())
00724 #endif
00725
00732 #define Is_interrupt_level_enabled(int_lev) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_lev, M_MASK)))
00733
00738 #if __GNUC__
00739 #define Disable_interrupt_level(int_lev) ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));})
00740 #elif __ICCAVR32__
00741 #define Disable_interrupt_level(int_lev) {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET))"\n\tnop\n\tnop");}
00742 #endif
00743
00748 #if __GNUC__
00749 #define Enable_interrupt_level(int_lev) ({__asm__ __volatile__ ("csrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));})
00750 #elif __ICCAVR32__
00751 #define Enable_interrupt_level(int_lev) (__clear_status_flag(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)))
00752 #endif
00753
00755
00756 #endif // __AVR32_ABI_COMPILER__
00757
00758
00760 #if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)
00761 #define LITTLE_ENDIAN_MCU FALSE
00762 #endif
00763
00764
00765 #ifndef LITTLE_ENDIAN_MCU
00766 #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE
00767 #endif
00768
00770 #define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU)
00771
00772
00773 #ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
00774
00777
00778
00779 #if LITTLE_ENDIAN_MCU
00780
00781 #define LSB(u16) (((U8 *)&(u16))[0])
00782 #define MSB(u16) (((U8 *)&(u16))[1])
00783
00784 #define LSH(u32) (((U16 *)&(u32))[0])
00785 #define MSH(u32) (((U16 *)&(u32))[1])
00786 #define LSB0W(u32) (((U8 *)&(u32))[0])
00787 #define LSB1W(u32) (((U8 *)&(u32))[1])
00788 #define LSB2W(u32) (((U8 *)&(u32))[2])
00789 #define LSB3W(u32) (((U8 *)&(u32))[3])
00790 #define MSB3W(u32) LSB0W(u32)
00791 #define MSB2W(u32) LSB1W(u32)
00792 #define MSB1W(u32) LSB2W(u32)
00793 #define MSB0W(u32) LSB3W(u32)
00794
00795 #define LSW(u64) (((U32 *)&(u64))[0])
00796 #define MSW(u64) (((U32 *)&(u64))[1])
00797 #define LSH0(u64) (((U16 *)&(u64))[0])
00798 #define LSH1(u64) (((U16 *)&(u64))[1])
00799 #define LSH2(u64) (((U16 *)&(u64))[2])
00800 #define LSH3(u64) (((U16 *)&(u64))[3])
00801 #define MSH3(u64) LSH0(u64)
00802 #define MSH2(u64) LSH1(u64)
00803 #define MSH1(u64) LSH2(u64)
00804 #define MSH0(u64) LSH3(u64)
00805 #define LSB0D(u64) (((U8 *)&(u64))[0])
00806 #define LSB1D(u64) (((U8 *)&(u64))[1])
00807 #define LSB2D(u64) (((U8 *)&(u64))[2])
00808 #define LSB3D(u64) (((U8 *)&(u64))[3])
00809 #define LSB4D(u64) (((U8 *)&(u64))[4])
00810 #define LSB5D(u64) (((U8 *)&(u64))[5])
00811 #define LSB6D(u64) (((U8 *)&(u64))[6])
00812 #define LSB7D(u64) (((U8 *)&(u64))[7])
00813 #define MSB7D(u64) LSB0D(u64)
00814 #define MSB6D(u64) LSB1D(u64)
00815 #define MSB5D(u64) LSB2D(u64)
00816 #define MSB4D(u64) LSB3D(u64)
00817 #define MSB3D(u64) LSB4D(u64)
00818 #define MSB2D(u64) LSB5D(u64)
00819 #define MSB1D(u64) LSB6D(u64)
00820 #define MSB0D(u64) LSB7D(u64)
00821
00822 #else // BIG_ENDIAN_MCU
00823
00824 #define MSB(u16) (((U8 *)&(u16))[0])
00825 #define LSB(u16) (((U8 *)&(u16))[1])
00826
00827 #define MSH(u32) (((U16 *)&(u32))[0])
00828 #define LSH(u32) (((U16 *)&(u32))[1])
00829 #define MSB0W(u32) (((U8 *)&(u32))[0])
00830 #define MSB1W(u32) (((U8 *)&(u32))[1])
00831 #define MSB2W(u32) (((U8 *)&(u32))[2])
00832 #define MSB3W(u32) (((U8 *)&(u32))[3])
00833 #define LSB3W(u32) MSB0W(u32)
00834 #define LSB2W(u32) MSB1W(u32)
00835 #define LSB1W(u32) MSB2W(u32)
00836 #define LSB0W(u32) MSB3W(u32)
00837
00838 #define MSW(u64) (((U32 *)&(u64))[0])
00839 #define LSW(u64) (((U32 *)&(u64))[1])
00840 #define MSH0(u64) (((U16 *)&(u64))[0])
00841 #define MSH1(u64) (((U16 *)&(u64))[1])
00842 #define MSH2(u64) (((U16 *)&(u64))[2])
00843 #define MSH3(u64) (((U16 *)&(u64))[3])
00844 #define LSH3(u64) MSH0(u64)
00845 #define LSH2(u64) MSH1(u64)
00846 #define LSH1(u64) MSH2(u64)
00847 #define LSH0(u64) MSH3(u64)
00848 #define MSB0D(u64) (((U8 *)&(u64))[0])
00849 #define MSB1D(u64) (((U8 *)&(u64))[1])
00850 #define MSB2D(u64) (((U8 *)&(u64))[2])
00851 #define MSB3D(u64) (((U8 *)&(u64))[3])
00852 #define MSB4D(u64) (((U8 *)&(u64))[4])
00853 #define MSB5D(u64) (((U8 *)&(u64))[5])
00854 #define MSB6D(u64) (((U8 *)&(u64))[6])
00855 #define MSB7D(u64) (((U8 *)&(u64))[7])
00856 #define LSB7D(u64) MSB0D(u64)
00857 #define LSB6D(u64) MSB1D(u64)
00858 #define LSB5D(u64) MSB2D(u64)
00859 #define LSB4D(u64) MSB3D(u64)
00860 #define LSB3D(u64) MSB4D(u64)
00861 #define LSB2D(u64) MSB5D(u64)
00862 #define LSB1D(u64) MSB6D(u64)
00863 #define LSB0D(u64) MSB7D(u64)
00864
00865 #endif
00866
00868
00869
00880
00881
00890 #define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\
00891 ((U16)(u16) << 8)))
00892
00901 #define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\
00902 ((U32)Swap16((U32)(u32)) << 16)))
00903
00912 #define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\
00913 ((U64)Swap32((U64)(u64)) << 32)))
00914
00923 #if __GNUC__
00924 #define swap16(u16) __builtin_bswap_16(u16)
00925 #elif __ICCAVR32__
00926 #define swap16(u16) Swap16(u16)
00927 #endif
00928
00937 #if __GNUC__
00938 #define swap32(u32) __builtin_bswap_32(u32)
00939 #elif __ICCAVR32__
00940 #define swap32(u32) Swap32(u32)
00941 #endif
00942
00951 #define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\
00952 ((U64)swap32((U64)(u64)) << 32)))
00953
00955
00956
00959
00960
00961 #define _GLOBEXT_ extern
00962 #define _CONST_TYPE_ const
00963 #define _MEM_TYPE_SLOW_
00964 #define _MEM_TYPE_MEDFAST_
00965 #define _MEM_TYPE_FAST_
00966
00967 typedef U8 Byte;
00968
00969 #define memcmp_ram2ram memcmp
00970 #define memcmp_code2ram memcmp
00971 #define memcpy_ram2ram memcpy
00972 #define memcpy_code2ram memcpy
00973
00974 #define LSB0(u32) LSB0W(u32)
00975 #define LSB1(u32) LSB1W(u32)
00976 #define LSB2(u32) LSB2W(u32)
00977 #define LSB3(u32) LSB3W(u32)
00978 #define MSB3(u32) MSB3W(u32)
00979 #define MSB2(u32) MSB2W(u32)
00980 #define MSB1(u32) MSB1W(u32)
00981 #define MSB0(u32) MSB0W(u32)
00982
00984
00985 #endif // __AVR32_ABI_COMPILER__
00986
00987
00988 #endif // _COMPILER_H_