ltv350qv.c

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00001 /*This file has been prepared for Doxygen automatic documentation generation.*/
00019 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00020  *
00021  * Redistribution and use in source and binary forms, with or without
00022  * modification, are permitted provided that the following conditions are met:
00023  *
00024  * 1. Redistributions of source code must retain the above copyright notice,
00025  * this list of conditions and the following disclaimer.
00026  *
00027  * 2. Redistributions in binary form must reproduce the above copyright notice,
00028  * this list of conditions and the following disclaimer in the documentation
00029  * and/or other materials provided with the distribution.
00030  *
00031  * 3. The name of ATMEL may not be used to endorse or promote products derived
00032  * from this software without specific prior written permission.
00033  *
00034  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00035  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00036  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00037  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00038  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00040  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00041  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00042  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00043  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00044  */
00045 
00046 
00047 #include "spi.h"
00048 #include "pm.h"
00049 #include <stdio.h>
00050 #include <sys/sysregs.h>
00051 
00052 #define sysreg_read(addr)            __builtin_mfsr(addr)
00053 #define sysreg_write(addr, value)    __builtin_mtsr(addr, value)
00054 
00055 
00056 #define write_reg(spi, reg, val)                                \
00057         do {                                            \
00058                 ret = ltv350qv_write_reg(spi, reg, val);        \
00059                 if (ret){                               \
00060                         usart_print(usart, "Error spi timeout\n");\
00061                         goto out;                       \
00062                 }\
00063         } while (0)
00064 
00065 extern volatile struct avr32_usart_t *usart;
00066 extern void usart_print(volatile struct avr32_usart_t * usart, char *str);
00067 
00068 static inline unsigned int get_count(void)
00069 {
00070         return sysreg_read(SYSREG_COUNT);
00071 }
00072 
00077 void usdelay(unsigned long usec)
00078 {
00079         unsigned long start, stop;
00080         unsigned long ticks;
00081 
00082         start = get_count();
00083         ticks = usec * (pm_read_mclk() / 1000000);
00084         stop = start + ticks;
00085 
00086         if (start > stop)
00087                 while (get_count() > start) ;
00088         
00089         while (get_count() < stop) ;
00090 }
00097 static int ltv350qv_write_reg(volatile avr32_spi_t * spi, unsigned char reg, unsigned short val)
00098 {
00099         int i;
00100         unsigned char buffer[3];
00101 
00102         buffer[0] = 0x74;
00103         buffer[1] = 0x00;
00104         buffer[2] = reg & 0x7f;
00105         
00106         for( i = 0; i <= 2; i++){
00107                 if( spi_variableSlaveWrite(spi, buffer[i], 1, (i == 2 ? 1 : 0)) != SPI_OK)
00108                         return -1;
00109         }
00110 
00111         buffer[0] = 0x76;
00112         buffer[1] = val >> 8;
00113         buffer[2] = val;
00114         
00115         for( i = 0; i <= 2; i++){
00116                 if( spi_variableSlaveWrite(spi, buffer[i], 1, (i == 2 ? 1 : 0)) != SPI_OK)
00117                         return -1;
00118         }
00119         return 0;
00120 }
00121 
00127 void ltv350qv_power_on(volatile avr32_spi_t * spi, unsigned char chip_select)
00128 {
00129         int ret;
00130 
00131         usart_print(usart,"ltv350qv: do power on sequence\n");
00132         spi_selectChip(spi, chip_select);
00133         /* write startup procedure */
00134         write_reg(spi, 9, 0x0000);
00135         usdelay(15000);
00136         write_reg(spi, 9, 0x4000);
00137         write_reg(spi, 10, 0x2000);
00138         write_reg(spi, 9, 0x4055);
00139         usdelay(55000);
00140         write_reg(spi, 1, 0x409d);
00141         write_reg(spi, 2, 0x0204);
00142         write_reg(spi, 3, 0x0100);
00143         write_reg(spi, 4, 0x3000);
00144         write_reg(spi, 5, 0x4003);
00145         write_reg(spi, 6, 0x000a);
00146         write_reg(spi, 7, 0x0021);
00147         write_reg(spi, 8, 0x0c00);
00148         write_reg(spi, 10, 0x0103);
00149         write_reg(spi, 11, 0x0301);
00150         write_reg(spi, 12, 0x1f0f);
00151         write_reg(spi, 13, 0x1f0f);
00152         write_reg(spi, 14, 0x0707);
00153         write_reg(spi, 15, 0x0307);
00154         write_reg(spi, 16, 0x0707);
00155         write_reg(spi, 17, 0x0000);
00156         write_reg(spi, 18, 0x0004);
00157         write_reg(spi, 19, 0x0000);
00158 
00159         usdelay(20000);
00160         write_reg(spi, 9, 0x4a55);
00161         write_reg(spi, 5, 0x5003);
00162 
00163         usart_print(usart,"ltv350qv: power on sequence done\n");
00164 out:
00165         return;
00166 }
00172 void ltv350qv_power_off(volatile avr32_spi_t * spi, unsigned char chip_select)
00173 {
00174         int ret;
00175         spi_selectChip(spi, chip_select);
00176         usart_print(usart,"ltv350qv: do power off sequence\n");
00177         /* GON -> 0, POC -> 0 */
00178         write_reg(spi, 9, 0x4055);
00179         /* DSC -> 0 */
00180         write_reg(spi, 5, 0x4003);
00181         /* VCOMG -> 0 */
00182         write_reg(spi, 10, 0x2103);
00183 
00184         usdelay(1000000);
00185 
00186         /* AP[2:0] -> 000 */
00187         write_reg(spi, 9, 0x4050);
00188 
00189         usart_print(usart,"ltv350qv: power off sequence done\n");
00190 out:
00191         return;
00192 }

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