lcdc_vga_example.c File Reference

Detailed Description

LCD controller example for the STK1000.

This example shows how to set up the LCD Controller in combination with an external analog monitor. Three configurations for the resoultions VGA 648x480, SVGA 800x600 and XVGA 1024X768 are available. Check your monitor specifications if it supports one of these configurations. If not the parameters can be adjusted (blanking, polarity ...). To choose a configuration uncomment one of the defines in the example code. define CONF_640_480_60 -> VGA 640x480 define CONF_800_600_60 -> SVGA 800x600 define CONF_1024_768_60 -> XVGA 1024x768 Before you run this application program the picture (AVR32.bmp) into the flash at address 0x00400000. Use for instance the avr32program application for this purpose. avr32program -F bin -O 0x00400000 -v -e -fcfi AVR32.bmp If this picture is not available a blank rectangle will be visible in the upper left corner. The pictures resolution is 320x240 (QVGA).

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/
$Name$
Revision
697M
$RCSfile$
Date
2008-05-07 15:59:43 +0200 (Wed, 07 May 2008)

Definition in file lcdc_vga_example.c.

#include "usart.h"
#include "pio.h"
#include "lcdc.h"
#include <string.h>
#include <avr32/io.h>
#include "sdram.h"
#include "errno.h"

Include dependency graph for lcdc_vga_example.c:

Go to the source code of this file.

Defines

#define BITMAP_FILE_ADDRESS   0xA0400000
#define CONF_800_600_60
#define CPU_FAMILY   "AVR32_AP"
#define CPU_TYPE   "AT32AP7000"
#define DEFAULT_FREQ   OSC0_FREQ
#define DEFAULT_UART   UART_A
#define IRDA   AVR32_USART2
#define MAX_FREQ   150000000
#define OSC0_FREQ   20000000
#define OSC1_FREQ   12000000
#define PLL_TIMEOUT   500000
#define REFRESH_RATE   1170
#define SDRAM_SIZE   8
#define UART_A   AVR32_USART1
#define UART_C   AVR32_USART3

Functions

int board_init (void)
int display_bm (lcdc_conf_t *lcdc_conf, void *file_start)
 Dispays the content of a bitmap file in the frame buffer.
void fill_frame_buffer (lcdc_conf_t *lcdc_conf)
 Fill the frame buffer with a test picture.
static int init_uart_a (int module_frequ)
void lcdc_pio_config (void)
 Sets up the pins for the LCD on the STK1000.
int main (void)
static int mt481c2m32b2tg_init (const sdram_info *info)
void usart_print (volatile struct avr32_usart_t *usart, char *str)
void usart_printHex (volatile avr32_usart_t *usart, const unsigned long n)

Variables

lcdc_conf_t lcdc_1024_768_60_conf
 Configuration 1024x768.
lcdc_conf_t lcdc_800_600_60_conf
 Configuration VGA 800x600.
lcdc_conf_t lcdc_vga_std_conf
 Configuration 640x480.
static struct sdram_info sdram
volatile avr32_usart_t * usart = &AVR32_USART1
 USART used for console output.

Define Documentation

#define BITMAP_FILE_ADDRESS   0xA0400000

Definition at line 75 of file lcdc_vga_example.c.

#define CONF_800_600_60

Definition at line 72 of file lcdc_vga_example.c.

#define CPU_FAMILY   "AVR32_AP"

Definition at line 77 of file lcdc_vga_example.c.

#define CPU_TYPE   "AT32AP7000"

Definition at line 78 of file lcdc_vga_example.c.

#define DEFAULT_FREQ   OSC0_FREQ

Definition at line 81 of file lcdc_vga_example.c.

#define DEFAULT_UART   UART_A

Definition at line 82 of file lcdc_vga_example.c.

#define IRDA   AVR32_USART2

Definition at line 96 of file lcdc_vga_example.c.

#define MAX_FREQ   150000000

Definition at line 79 of file lcdc_vga_example.c.

#define OSC0_FREQ   20000000

Definition at line 85 of file lcdc_vga_example.c.

#define OSC1_FREQ   12000000

Definition at line 86 of file lcdc_vga_example.c.

#define PLL_TIMEOUT   500000

Definition at line 89 of file lcdc_vga_example.c.

Referenced by board_init().

#define REFRESH_RATE   1170

Definition at line 99 of file lcdc_vga_example.c.

Referenced by mt481c2m32b2tg_init().

#define SDRAM_SIZE   8

Definition at line 91 of file lcdc_vga_example.c.

#define UART_A   AVR32_USART1

Definition at line 94 of file lcdc_vga_example.c.

#define UART_C   AVR32_USART3

Definition at line 95 of file lcdc_vga_example.c.

Function Documentation

int board_init ( void   ) 

Definition at line 213 of file lcdc_vga_example.c.

References pll_opt_t::divider, ERROR, init_uart_a(), INVALID_ARGUMENT, mt481c2m32b2tg_init(), pll_opt_t::multiplier, pll_opt_t::oscillator, pll_opt_t::pll, PLL_TIMEOUT, PM_OSC0, PM_PLL0, pm_read_mclk(), pm_set_mclk_source(), pm_set_pll(), sdram, usart, usart_print(), usart_printHex(), and usart_reset().

00214 {
00215         volatile struct avr32_usart_t *usart = &AVR32_USART1;
00216         volatile struct avr32_pm_t *pm = &AVR32_PM;
00217         volatile struct avr32_smc_t * smc = &AVR32_SMC;
00218         volatile struct avr32_hmatrix_t * phm = &AVR32_HMATRIX;
00219         unsigned int timeout = PLL_TIMEOUT;
00220 
00221         /* Initialize USART */
00222         if(init_uart_a(20000000))
00223                 return INVALID_ARGUMENT;
00224         usart_print(usart, "STK1000 initialization:\n");
00225         usart_print(usart, " -> USART ... OK\n");
00226         /* reset usart before clock change */
00227         usart_reset(usart);
00228 
00229         
00230         /* SLOT_CYCLE -> max burst cycles (slow bursts can be broken)
00231         * DEFMSTR_TYPE -> 0 No default master, 1 last default master, 
00232         * 2 fixed master
00233         * FIXED_DEFMSTR -> master number (5 = LCD Controller)
00234         * ARBT -> 0 round robin, 1 fixed priority
00235         */
00236         
00237         phm->scfg[4] = ((16 << AVR32_HMATRIX_SCFG4_SLOT_CYCLE_OFFSET) 
00238                 & AVR32_HMATRIX_SCFG4_SLOT_CYCLE_MASK) 
00239                 | ((2 << AVR32_HMATRIX_SCFG4_DEFMSTR_TYPE_OFFSET) 
00240                 & AVR32_HMATRIX_SCFG4_DEFMSTR_TYPE_OFFSET) 
00241                 | ((5 << AVR32_HMATRIX_SCFG4_FIXED_DEFMSTR_OFFSET 
00242                 & AVR32_HMATRIX_SCFG4_FIXED_DEFMSTR_OFFSET)) 
00243                 | ((1 << AVR32_HMATRIX_SCFG4_ARBT_OFFSET));
00244         
00245         /* Set maximum priority to LCD Controller */
00246         phm->prs[4].pras = 0x00F00000;
00247                 
00248         /* set up SMC for higher frequencies */
00249         smc->cs[0].mode = 0x00031103;
00250         smc->cs[0].cycle = 0x000c000d;
00251         smc->cs[0].pulse = 0x0b0a0906;
00252         smc->cs[0].setup = 0x00010002;
00253         
00254         pm->pll0 = (0 << AVR32_PM_PLL0_PLLOSC_OFFSET) 
00255                 | ( (15 - 1) << AVR32_PM_PLL0_PLLMUL_OFFSET)
00256                 | ( (2 - 1) << AVR32_PM_PLL0_PLLDIV_OFFSET) 
00257                 | ( 16 << AVR32_PM_PLL0_PLLCOUNT_OFFSET) 
00258                 | ( 0x4 << AVR32_PM_PLL0_PLLOPT_OFFSET) 
00259                 | ( 1 << AVR32_PM_PLL0_PLLEN_OFFSET);
00260         
00261         /* Wait until pll has locked or a timeout elapsed*/
00262         while(!(pm->isr & (1 << AVR32_PM_ISR_LOCK0_OFFSET))
00263                 && (timeout != 0)){
00264                 timeout--;
00265         }
00266         
00267         if(timeout == 0){
00268                 usart_print(usart, "ERROR: PLL did not lock");
00269                 return -1;
00270         }
00271 
00272         pm->cksel = (1 << AVR32_PM_CKSEL_HSBDIV_OFFSET) 
00273                 | ( 0 << AVR32_PM_CKSEL_HSBSEL_OFFSET) 
00274                 | ( 1 << AVR32_PM_CKSEL_PBADIV_OFFSET) 
00275                 | ( 1 << AVR32_PM_CKSEL_PBASEL_OFFSET) 
00276                 | ( 1 << AVR32_PM_CKSEL_PBBDIV_OFFSET) 
00277                 | ( 1 << AVR32_PM_CKSEL_PBBSEL_OFFSET);
00278 
00279         pm->mcctrl = 0x2;
00280         
00281         if(init_uart_a(37500000)) /* reinitialize due to clock change */
00282                 return INVALID_ARGUMENT;
00283         usart_print(usart, "OK\n");
00284         
00285         /* Initialize SDRAMC */
00286         usart_print(usart, " -> SDRAM ... ");
00287         if (mt481c2m32b2tg_init(&sdram) )
00288                 return ERROR;
00289         usart_print(usart, "OK\n");
00290 
00291         /* Done. Print frequency and return */
00292         usart_print(usart, "STK1000 is successfully initialized");
00293 
00294         return 0;
00295 }

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int display_bm ( lcdc_conf_t *  lcdc_conf,
void *  file_start 
)

Dispays the content of a bitmap file in the frame buffer.

Parameters:
lcdc_conf Pointer to the LCD controller configuration
file_start Pointer to the beginning of the file

Definition at line 270 of file bmp_lib.c.

References bm_file_header_t::bfOffBits, bm_file_header_t::bfSize, bm_file_header_t::bfType, bm_info_header_t::biBitCount, bm_info_header_t::biCompression, bm_info_header_t::biHeight, bm_info_header_t::biWidth, fill_frame_buffer_bm(), and swap_endian_blk().

Referenced by main().

00270                                                          {
00271         
00272         bm_file_header_t bm_file_header;
00273         bm_info_header_t bm_info_header;
00274         unsigned char * data_start;
00275         
00276         /* get file header and header information */
00277         memcpy(&bm_file_header, file_start, sizeof(bm_file_header_t));
00278         memcpy(&bm_info_header, file_start + 14, sizeof(bm_info_header_t));
00279         
00280         /* correct endianess */
00281         swap_endian_blk((unsigned char *) &bm_file_header.bfType, 2);
00282         swap_endian_blk((unsigned char *) &bm_file_header.bfSize, 4);
00283         swap_endian_blk((unsigned char *) &bm_file_header.bfOffBits, 4);
00284         swap_endian_blk((unsigned char *) &bm_info_header.biWidth, 4);
00285         swap_endian_blk((unsigned char *) &bm_info_header.biHeight, 4);
00286         swap_endian_blk((unsigned char *) &bm_info_header.biBitCount, 2);
00287         swap_endian_blk((unsigned char *) &bm_info_header.biCompression, 4);
00288         
00289         
00290         data_start = file_start + bm_file_header.bfOffBits;     
00291         fill_frame_buffer_bm(lcdc_conf, &bm_info_header, data_start);
00292         
00293         return 0;               
00294 }

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void fill_frame_buffer ( lcdc_conf_t *  lcdc_conf  ) 

Fill the frame buffer with a test picture.

Parameters:
lcdc_conf Pointer to LCD configuration structure

Definition at line 460 of file lcdc_vga_example.c.

References BPP_16, BPP_24, lcdc_conf_t::dmabaddr1, lcdc_conf_t::pixelsize, lcdc_conf_t::xres, and lcdc_conf_t::yres.

00461 {
00462         
00463         unsigned int k,l,x,y;
00464         unsigned char * framePtr;
00465         unsigned short tmp;
00466         
00467         framePtr = (unsigned char *) (lcdc_conf->dmabaddr1 | 0xA0000000);
00468         
00469         if(lcdc_conf->pixelsize == BPP_24){
00470         for (l=0; l < lcdc_conf->yres; l++){
00471                 for (k=0; k < lcdc_conf->xres; k++) 
00472                 {
00473                         x = (255 * l) / lcdc_conf->yres;
00474                         y = (255 * k) / lcdc_conf->xres;
00475                         *framePtr++ = x;
00476                         *framePtr++ = y;
00477                         *framePtr++ = 255 - (x + y) / 2;
00478                 }
00479         }
00480         }
00481         if(lcdc_conf->pixelsize == BPP_16){
00482                 for (l=0; l < lcdc_conf->yres; l++){
00483                         for (k=0; k < lcdc_conf->xres; k++)
00484                         {
00485                                 x = (32 * l) / lcdc_conf->yres;
00486                                 y = (32 * k) / lcdc_conf->xres;
00487                                 /* 1-5-5-5 format */
00488                                 tmp =  (((32 - (x + y) / 2) << 10)& 0x0007C00) | ((y << 5) & 0x000003E0) | (x & 0x0000001F);
00489                                 *framePtr = tmp;
00490                                 framePtr += 2;
00491                         }
00492                 }
00493         }
00494 }

static int init_uart_a ( int  module_frequ  )  [static]

Definition at line 186 of file lcdc_vga_example.c.

References usart_options_t::baudrate, usart_options_t::channelmode, usart_options_t::charlength, INVALID_ARGUMENT, usart_options_t::paritytype, pio_enable_module(), usart_options_t::stopbits, SUCCESS, usart, USART_1_STOPBIT, usart_init_rs232(), USART_NO_PARITY, and USART_NORMAL_CHMODE.

00187 { 
00188         struct usart_options_t opt;
00189         volatile struct avr32_usart_t *usart = &AVR32_USART1;
00190 
00191         avr32_piomap_t usart_piomap = {                            \
00192                 {AVR32_USART1_RXD_0_PIN, AVR32_USART1_RXD_0_FUNCTION}, \
00193                 {AVR32_USART1_TXD_0_PIN, AVR32_USART1_TXD_0_FUNCTION}   \
00194         };
00195 
00196         /* Set options for the USART */
00197         opt.baudrate = 115200;
00198         opt.charlength = 8;
00199         opt.paritytype = USART_NO_PARITY;
00200         opt.stopbits = USART_1_STOPBIT;
00201         opt.channelmode = USART_NORMAL_CHMODE;
00202 
00203         /* Initialize it in RS232 mode */
00204         if(usart_init_rs232(usart, &opt, module_frequ ) )
00205                 return INVALID_ARGUMENT;
00206 
00207         /* Setup pio for USART */
00208         pio_enable_module(usart_piomap, 2);
00209 
00210         return SUCCESS;
00211 }

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void lcdc_pio_config ( void   ) 

Sets up the pins for the LCD on the STK1000.

Definition at line 417 of file lcdc_vga_example.c.

References pio_enable_module().

Referenced by main().

00417                           {
00418         /* CC and MOD signals are not used for the video DAC and are not connected to 
00419         * the monitor interface
00420         */
00421                 avr32_piomap_t piomap = {
00422                         { AVR32_LCDC_DVAL_0_0_PIN, AVR32_LCDC_DVAL_0_0_FUNCTION },
00423                         { AVR32_LCDC_HSYNC_0_PIN, AVR32_LCDC_HSYNC_0_FUNCTION },
00424                         { AVR32_LCDC_PCLK_0_PIN, AVR32_LCDC_PCLK_0_FUNCTION },
00425                         { AVR32_LCDC_PWR_0_PIN, AVR32_LCDC_PWR_0_FUNCTION },
00426                         { AVR32_LCDC_VSYNC_0_PIN, AVR32_LCDC_VSYNC_0_FUNCTION },
00427                         { AVR32_LCDC_DATA_0_0_PIN, AVR32_LCDC_DATA_0_0_FUNCTION },
00428                         { AVR32_LCDC_DATA_1_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00429                         { AVR32_LCDC_DATA_2_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00430                         { AVR32_LCDC_DATA_3_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00431                         { AVR32_LCDC_DATA_4_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00432                         { AVR32_LCDC_DATA_5_PIN, AVR32_LCDC_DATA_5_FUNCTION },
00433                         { AVR32_LCDC_DATA_6_PIN, AVR32_LCDC_DATA_6_FUNCTION },
00434                         { AVR32_LCDC_DATA_7_PIN, AVR32_LCDC_DATA_7_FUNCTION },
00435                         { AVR32_LCDC_DATA_8_0_PIN, AVR32_LCDC_DATA_8_0_FUNCTION },
00436                         { AVR32_LCDC_DATA_9_0_PIN, AVR32_LCDC_DATA_9_0_FUNCTION },
00437                         { AVR32_LCDC_DATA_10_0_PIN, AVR32_LCDC_DATA_10_0_FUNCTION },
00438                         { AVR32_LCDC_DATA_11_0_PIN, AVR32_LCDC_DATA_11_0_FUNCTION },
00439                         { AVR32_LCDC_DATA_12_0_PIN, AVR32_LCDC_DATA_12_0_FUNCTION },
00440                         { AVR32_LCDC_DATA_13_PIN, AVR32_LCDC_DATA_13_FUNCTION },
00441                         { AVR32_LCDC_DATA_14_PIN, AVR32_LCDC_DATA_14_FUNCTION },
00442                         { AVR32_LCDC_DATA_15_PIN, AVR32_LCDC_DATA_15_FUNCTION },
00443                         { AVR32_LCDC_DATA_16_0_PIN, AVR32_LCDC_DATA_16_0_FUNCTION },
00444                         { AVR32_LCDC_DATA_17_0_PIN, AVR32_LCDC_DATA_17_0_FUNCTION },
00445                         { AVR32_LCDC_DATA_18_0_PIN, AVR32_LCDC_DATA_18_0_FUNCTION },
00446                         { AVR32_LCDC_DATA_19_0_PIN, AVR32_LCDC_DATA_19_0_FUNCTION },
00447                         { AVR32_LCDC_DATA_20_0_PIN, AVR32_LCDC_DATA_20_0_FUNCTION },
00448                         { AVR32_LCDC_DATA_21_0_PIN, AVR32_LCDC_DATA_21_0_FUNCTION },
00449                         { AVR32_LCDC_DATA_22_PIN, AVR32_LCDC_DATA_22_FUNCTION },
00450                         { AVR32_LCDC_DATA_23_PIN, AVR32_LCDC_DATA_23_FUNCTION }
00451                         
00452         };
00453         pio_enable_module(piomap, 31);
00454         
00455 }

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int main ( void   ) 

Definition at line 495 of file lcdc_vga_example.c.

References BITMAP_FILE_ADDRESS, board_init(), display_bm(), lcdc_conf_t::dmabaddr1, fill_frame_buffer(), lcdc_init(), lcdc_pio_config(), lcdc_conf_t::pixelsize, usart, usart_print(), lcdc_conf_t::xres, and lcdc_conf_t::yres.

00496 {
00497         volatile avr32_pm_t *pm = &AVR32_PM;
00498         lcdc_conf_t * lcdc_conf;
00499         unsigned char mul, div;
00500         
00501 #ifdef CONF_640_480_60
00502         lcdc_conf = &lcdc_vga_std_conf;
00503         /* 25MHz pixel clock */
00504         mul = 25;
00505         div = 12;
00506 #endif
00507 #ifdef CONF_800_600_60
00508         lcdc_conf = &lcdc_800_600_60_conf;
00509         /* 40 MHz pixel clock */
00510         mul = 10;
00511         div = 3;
00512 #endif
00513 #ifdef CONF_1024_768_60
00514         lcdc_conf = &lcdc_1024_768_60_conf;
00515         /* 63,5 MHz pixel clock */
00516         mul = 37;
00517         div = 7;
00518 #endif
00519         
00520         board_init();
00521         usart_print(usart, "board init complete\n");
00522         
00523         usart_print(usart, "Setting up PLL1 for LCD Controller\n");
00524         usart_print(usart, " -> PLL1 ... ");
00525         pm->pll1 = (1 << AVR32_PM_PLL1_PLLOSC_OFFSET) |
00526                                 ( (mul - 1) << AVR32_PM_PLL1_PLLMUL_OFFSET) |
00527                                 ( (div - 1) << AVR32_PM_PLL1_PLLDIV_OFFSET) |
00528                                 ( 16 << AVR32_PM_PLL1_PLLCOUNT_OFFSET) |
00529                                 ( 0x4 << AVR32_PM_PLL1_PLLOPT_OFFSET) |
00530                                 ( 1 << AVR32_PM_PLL1_PLLEN_OFFSET);
00531                         
00532         while(!(pm->isr & (1 << AVR32_PM_ISR_LOCK1_OFFSET)));
00533         usart_print(usart, "OK\n");
00534         
00535         /* clear framebuffer */
00536         memset((void *)lcdc_conf->dmabaddr1, 0, lcdc_conf->xres * lcdc_conf->yres * lcdc_conf->pixelsize / 8);
00537         
00538         fill_frame_buffer(lcdc_conf);
00539         display_bm(lcdc_conf, ((void *) BITMAP_FILE_ADDRESS));
00540         
00541         usart_print(usart, "Setting up LCD controller\n");
00542         lcdc_pio_config();
00543         
00544         /* Power manager setup 
00545         * Enable CLOCK for LCDC in HSBMASK
00546         */
00547         pm->hsb_mask |= 0x00000080;
00548         /* Feed generic clock for LCD Controller from PLL1 */
00549         pm->gcctrl[7] |= 0x00000007;
00550         
00551         lcdc_init(lcdc_conf);
00552         usart_print(usart, "Setup complete\n");
00553         while(1);
00554         
00555         return 0;
00556 }

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static int mt481c2m32b2tg_init ( const sdram_info *  info  )  [static]

Definition at line 146 of file lcdc_vga_example.c.

References INVALID_ARGUMENT, MODE_AUTOREFRESH, MODE_LOAD_MR, MODE_NORMAL, MODE_PRECHARGE, sdram_info::phys_addr, REFRESH_RATE, sdram_init(), and SUCCESS.

00147 {
00148         volatile unsigned long *sdram = (unsigned long *) info->phys_addr;
00149         volatile avr32_sdramc_t *sdramc = &AVR32_SDRAMC;
00150         unsigned long dummy_read;
00151         unsigned int i;
00152 
00153         if ( sdram_init(info) )
00154                 return INVALID_ARGUMENT;
00155 
00156         /* Precharge All command is issued to the SDRAM */
00157         sdramc->mr = MODE_PRECHARGE;
00158         dummy_read = sdramc->mr;
00159         sdram[0] = 0;
00160 
00161         /* Provide eight auto-refresh (CBR) cycles */
00162         sdramc->mr = MODE_AUTOREFRESH;
00163         dummy_read = sdramc->mr;
00164         for (i = 0; i < 8; i++)
00165         {
00166                 sdram[0] = 0;
00167         }
00168         
00169         /* CAS from info struct, burst length 1, serial burst type */
00170         sdramc->mr = MODE_LOAD_MR;
00171         dummy_read = sdramc->mr;
00172         sdram[0x020] = 0;
00173 
00174         /* A Normal Mode command is provided, 3 clocks after tMRD is met. */
00175         dummy_read = sdramc->mr;
00176         sdramc->mr = MODE_NORMAL;
00177         dummy_read = sdramc->mr;
00178         sdram[0] = 0;
00179         
00180         /* Write refresh rate into SDRAMC refresh timer count register */
00181         sdramc->tr = REFRESH_RATE;
00182 
00183         return SUCCESS;
00184 }

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void usart_print ( volatile struct avr32_usart_t *  usart,
char *  str 
)

Definition at line 119 of file lcdc_vga_example.c.

References usart_putchar().

00120 {
00121         while (*str != '\0')
00122                 usart_putchar(usart, *str++);
00123 }

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void usart_printHex ( volatile avr32_usart_t *  usart,
const unsigned long  n 
)

Definition at line 125 of file lcdc_vga_example.c.

References usart_print().

00126 {
00127         char tmp[9];
00128         int i;
00129 
00130         for (i = 0; i < 8; i++) {
00131                 unsigned long nibble;
00132 
00133                 nibble = (n >> (28 - 4 * i)) & 0x0F;
00134 
00135                 if (nibble < 10) {
00136                         tmp[i] = nibble + '0';
00137                 } else {
00138                         tmp[i] = nibble - 10 + 'a';
00139                 }
00140         }
00141 
00142         tmp[8] = 0;
00143         usart_print(usart, tmp);
00144 }

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Variable Documentation

lcdc_conf_t lcdc_1024_768_60_conf

Configuration 1024x768.

Definition at line 375 of file lcdc_vga_example.c.

lcdc_conf_t lcdc_800_600_60_conf

Configuration VGA 800x600.

Definition at line 336 of file lcdc_vga_example.c.

lcdc_conf_t lcdc_vga_std_conf

Configuration 640x480.

Definition at line 297 of file lcdc_vga_example.c.

struct sdram_info sdram [static]

Initial value:

 {
        .phys_addr      = AVR32_EBI1_ADDRESS,
        .bus_width      = 32,
        .rows           = 11,
        .cols           = 8,
        .banks          = 2,
        .cas            = 3,
        .twr            = 2,
        .trc            = 7,
        .trp            = 2,
        .trcd           = 2,
        .tras           = 5,
        .txsr           = 5,
}

Definition at line 101 of file lcdc_vga_example.c.

volatile avr32_usart_t* usart = &AVR32_USART1

USART used for console output.

Definition at line 116 of file lcdc_vga_example.c.

Generated on Wed May 7 16:03:17 2008 for AVR32114 Using the AVR32 LCD Controller by  doxygen 1.5.3-20071008