#include <avr32/io.h>
#include "sdram.h"
#include "usart.h"
#include "pm.h"
#include "pio.h"
#include "errno.h"
#include "utils.h"
Go to the source code of this file.
Defines | |
| #define | CPU_FAMILY "AVR32_AP" |
| #define | CPU_TYPE "AT32AP7000" |
| #define | DEFAULT_FREQ OSC0_FREQ |
| #define | DEFAULT_UART UART_A |
| #define | IRDA AVR32_USART2 |
| #define | MAX_FREQ 150000000 |
| #define | OSC0_FREQ 20000000 |
| #define | OSC1_FREQ 12000000 |
| #define | SDRAM_SIZE 8 |
| #define | UART_A AVR32_USART1 |
| #define | UART_C AVR32_USART3 |
Functions | |
| int | board_init (void) |
Variables | |
| static struct sdram_info | sdram |
| #define CPU_FAMILY "AVR32_AP" |
Definition at line 38 of file at32stk1000.h.
| #define CPU_TYPE "AT32AP7000" |
| #define DEFAULT_FREQ OSC0_FREQ |
Definition at line 42 of file at32stk1000.h.
| #define DEFAULT_UART UART_A |
Definition at line 43 of file at32stk1000.h.
| #define IRDA AVR32_USART2 |
Definition at line 55 of file at32stk1000.h.
| #define MAX_FREQ 150000000 |
Definition at line 40 of file at32stk1000.h.
| #define OSC0_FREQ 20000000 |
Definition at line 46 of file at32stk1000.h.
| #define OSC1_FREQ 12000000 |
Definition at line 47 of file at32stk1000.h.
| #define SDRAM_SIZE 8 |
Definition at line 50 of file at32stk1000.h.
| #define UART_A AVR32_USART1 |
Definition at line 53 of file at32stk1000.h.
| #define UART_C AVR32_USART3 |
Definition at line 54 of file at32stk1000.h.
| int board_init | ( | void | ) |
Definition at line 130 of file at32stk1000.c.
References pll_opt_t::divider, ERROR, init_uart_a(), INVALID_ARGUMENT, mt481c2m32b2tg_init(), pll_opt_t::multiplier, pll_opt_t::oscillator, pll_opt_t::pll, PLL_TIMEOUT, PM_OSC0, PM_PLL0, pm_read_mclk(), pm_set_mclk_source(), pm_set_pll(), sdram, usart, usart_print(), usart_printHex(), and usart_reset().
Referenced by main().
00131 { 00132 volatile struct avr32_usart_t *usart = &AVR32_USART1; 00133 volatile struct pll_opt_t pll_opt; 00134 00135 /* Initialize USART */ 00136 if(init_uart_a()) 00137 return INVALID_ARGUMENT; 00138 usart_print(usart, "STK1000 initialization:\n"); 00139 usart_print(usart, " -> USART ... OK\n"); 00140 00141 00142 /* Setup PLL at 40 MHz */ 00143 usart_print(usart, " -> PLL0 ... "); 00144 pll_opt.oscillator=PM_OSC0; 00145 pll_opt.pll=PM_PLL0; 00146 pll_opt.multiplier=2; 00147 pll_opt.divider=1; 00148 pm_set_pll(&pll_opt); 00149 00150 pm_set_mclk_source(PM_PLL0); 00151 00152 if(init_uart_a()) /* reinitialize due to clock change */ 00153 return INVALID_ARGUMENT; 00154 usart_print(usart, "OK\n"); 00155 00156 /* Initialize SDRAMC */ 00157 usart_print(usart, " -> SDRAM ... "); 00158 if (mt481c2m32b2tg_init(&sdram) ) 00159 return ERROR; 00160 usart_print(usart, "OK\n"); 00161 00162 00163 /* Done. Print frequency and return */ 00164 usart_print(usart, "STK1000 is successfully initialized at 0x"); 00165 usart_printHex(usart, pm_read_mclk()/1000000 ); 00166 usart_print(usart, " MHz\n"); 00167 00168 return 0; 00169 }
struct sdram_info sdram [static] |
Initial value:
{
.phys_addr = AVR32_EBI1_ADDRESS,
.bus_width = 32,
.rows = 11,
.cols = 8,
.banks = 2,
.cas = 3,
.twr = 2,
.trc = 7,
.trp = 2,
.trcd = 2,
.tras = 5,
.txsr = 5,
}
Definition at line 58 of file at32stk1000.h.
Referenced by board_init(), mt481c2m32b2tg_init(), and sdram_init().
1.5.3-20071008