mmu.h File Reference

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Detailed Description

MMU example application.

This file gives an example of using the MMU to manage the memory on AVR32 MCUs.

• Compiler: IAR EWAAVR32 and GNU GCC for AVR32
• Supported devices: All AVR32 devices with MMU.
• AppNote: AVR32113 Configuration and Use of the Memory Management Unit

Author:

Atmel Corporation: http://www.atmel.com
Support email: avr32@atmel.com

$Name$

Revision

$RCSfile$

Date

Definition in file mmu.h.

#include <avr32/io.h>
#include "settings.h"

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Data Structures
struct	mmu_tlb_t
	Struct which defines options for operating on TLB entries. More...
Enumerations
enum	{   MMU_ERROR = -1, MMU_OK = 0, MMU_ERROR_ARGUMENT = 1, MMU_TLB_MISS = 2,   MMU_DISABLE = 0, MMU_ENABLE = 1, MMU_PRIVATE_VIRTUAL_MODE = 0, MMU_SHARED_VIRTUAL_MODE = 1,   MMU_SEGMENTATION_OFF = 0, MMU_SEGMENTATION_ON = 1, MMU_TLB_TYPE_DATA = 0, MMU_TLB_TYPE_INSTRUCTION = 1,   MMU_PAGE_SIZE_1KB = 0, MMU_PAGE_SIZE_4KB = 1, MMU_PAGE_SIZE_64KB = 2, MMU_PAGE_SIZE_1MB = 3 }
	MMU defines for readable setup. More...
Functions
int	mmu_add_tlb_entry (long physical_addr_base, long virtual_addr_base, struct mmu_tlb_t *options)
	Adds an entry to the TLB.
int	mmu_find_index_to_entry (long physical_addr, long virtual_addr, long *index)
	Search the TLB for an entry matching the given physical and virtual address and return the index.
int	mmu_init (int enable, int mode, int segmentation)
	Changes mode on the MMU according to input.
int	mmu_invalidate_entry (int index, int type)
	Invalidates an entry in the TLB.
int	mmu_lock_entries (int entries, int type)
	Locks a specified number of entries.
void	mmu_read_bear_and_tlbehi (long *bear, long *vpn)
	Reads the TLBEAR and TLBEHI registers and place the contents in bear and vpn.
int	mmu_reset ()
	Resets the MMU and invalidates all TLB entries.
int	mmu_search_physical_ptr (void *physical_ptr, long *virtual_addr)
	Search a physical address and get the virtual address from the TLB. The function searches the data TLBs first before searching the instruction TLBs.
int	mmu_search_virtual_ptr (void *virtual_ptr, long *physical_addr)
	Search a virtual address and get the physical address from the TLB. The function searches the data TLBs first before searching the instruction TLBs.

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Enumeration Type Documentation

anonymous enum

MMU defines for readable setup.

Enumerator:

MMU_ERROR
MMU_OK
MMU_ERROR_ARGUMENT
MMU_TLB_MISS
MMU_DISABLE
MMU_ENABLE
MMU_PRIVATE_VIRTUAL_MODE
MMU_SHARED_VIRTUAL_MODE
MMU_SEGMENTATION_OFF
MMU_SEGMENTATION_ON
MMU_TLB_TYPE_DATA
MMU_TLB_TYPE_INSTRUCTION
MMU_PAGE_SIZE_1KB
MMU_PAGE_SIZE_4KB
MMU_PAGE_SIZE_64KB
MMU_PAGE_SIZE_1MB

Definition at line 113 of file mmu.h.

     {
    MMU_ERROR = -1,
    MMU_OK = 0,
    MMU_ERROR_ARGUMENT = 1,
    MMU_TLB_MISS = 2,

    MMU_DISABLE = 0,
    MMU_ENABLE = 1,
    MMU_PRIVATE_VIRTUAL_MODE = 0,
    MMU_SHARED_VIRTUAL_MODE = 1,
    MMU_SEGMENTATION_OFF = 0,
    MMU_SEGMENTATION_ON = 1,
    MMU_TLB_TYPE_DATA = 0,
    MMU_TLB_TYPE_INSTRUCTION = 1,

    MMU_PAGE_SIZE_1KB = 0,
    MMU_PAGE_SIZE_4KB = 1,
    MMU_PAGE_SIZE_64KB = 2,
    MMU_PAGE_SIZE_1MB = 3,
};

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Function Documentation

int mmu_add_tlb_entry	(	long	physical_addr_base,
		long	virtual_addr_base,
		struct mmu_tlb_t *	options
	)

Adds an entry to the TLB.

Parameters:

	physical_addr_base	base address of the physical placement
	virtual_addr_base	base address of the virtual placement
	options	options to the entry

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR_ARGUMENT	on invalid arguments

Definition at line 304 of file mmu.c.

References mmu_tlb_t::access, mmu_tlb_t::asid, mmu_tlb_t::bufferable, mmu_tlb_t::cachable, mmu_tlb_t::dirty, mmu_tlb_t::global, mmu_add_entry(), MMU_DISABLE, MMU_ENABLE, MMU_ERROR_ARGUMENT, MMU_OK, MMU_PAGE_SIZE_1KB, MMU_PAGE_SIZE_1MB, MMU_PAGE_SIZE_4KB, MMU_PAGE_SIZE_64KB, MMU_TLB_TYPE_DATA, MMU_TLB_TYPE_INSTRUCTION, mmu_tlb_t::page_size, mmu_tlb_t::position, mmu_tlb_t::type, mmu_tlb_t::valid, and mmu_tlb_t::write_through.

{
    if (!(options->valid == MMU_ENABLE
            || options->valid == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->type == MMU_TLB_TYPE_INSTRUCTION
            || options->type == MMU_TLB_TYPE_DATA)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->asid > 0xFF
            || options->asid < 0) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->cachable == MMU_ENABLE
            || options->cachable == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->global == MMU_ENABLE
            || options->global == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->bufferable == MMU_ENABLE
            || options->bufferable == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->access > 0x0D
            || options->access < 0) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->page_size == MMU_PAGE_SIZE_1KB
            || options->page_size == MMU_PAGE_SIZE_4KB
            || options->page_size == MMU_PAGE_SIZE_64KB
            || options->page_size == MMU_PAGE_SIZE_1MB)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->dirty == MMU_ENABLE
            || options->dirty == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->write_through == MMU_ENABLE
            || options->write_through == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->position < 0 ||
            ((options->type == MMU_TLB_TYPE_DATA &&
              options->position >= MMU_DTLB_ENTRIES) ||
             (options->type == MMU_TLB_TYPE_INSTRUCTION &&
              options->position >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    unsigned long vpn;
    unsigned long pfn;
    unsigned long addr_mask;

    if (options->page_size == MMU_PAGE_SIZE_1KB) {
        addr_mask = 0xFFFFFC00;
    }
    else if (options->page_size == MMU_PAGE_SIZE_4KB) {
        addr_mask = 0xFFFFF000;
    }
    else if (options->page_size == MMU_PAGE_SIZE_64KB) {
        addr_mask = 0xFFFF0000;
    }
    else if (options->page_size == MMU_PAGE_SIZE_1MB) {
        addr_mask = 0xFFF00000;
    } else {
        return MMU_ERROR_ARGUMENT;
    }

    vpn =
        (virtual_addr_base & addr_mask)|
        (options->valid<<AVR32_TLBEHI_V_OFFSET)|
        (options->type<<AVR32_TLBEHI_I_OFFSET)|
        (options->asid<<AVR32_TLBEHI_ASID_OFFSET);

    pfn =
        (physical_addr_base & addr_mask)|
        (options->cachable<<AVR32_TLBELO_C_OFFSET)|
        (options->global<<AVR32_TLBELO_G_OFFSET)|
        (options->bufferable<<AVR32_TLBELO_B_OFFSET)|
        (options->access<<AVR32_TLBELO_AP_OFFSET)|
        (options->page_size<<AVR32_TLBELO_SZ_OFFSET)|
        (options->dirty<<AVR32_TLBELO_D_OFFSET)|
        (options->write_through<<AVR32_TLBELO_W_OFFSET);

    int retVal = MMU_OK;

    retVal = mmu_add_entry(vpn, pfn, options->position, options->type);

    return retVal;
}

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int mmu_find_index_to_entry	(	long	physical_addr,
		long	virtual_addr,
		long *	index
	)

Search the TLB for an entry matching the given physical and virtual address and return the index.

Parameters:

	physical_addr	the physical address to find
	virtual_addr	the virtual address to find
	index	the index of the entry from the search

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_TLB_MISS	on TLB search miss

Definition at line 424 of file mmu.c.

References AVR32_READ_SR_REG, AVR32_SET_SR_REG, MMU_OK, and MMU_TLB_MISS.

{
    long vpn = virtual_addr & 0xFFFFfc00;
    long pfn = physical_addr & 0xFFFFfc00;

    AVR32_SET_SR_REG(AVR32_TLBEHI, vpn);
    AVR32_SET_SR_REG(AVR32_TLBELO, pfn);

#ifdef __GNUC__
    __builtin_tlbs();
#elif __ICCAVR32__
    __search_TLB_entry();
#else
#error No known compiler used
#endif

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if ((regValue & AVR32_MMUCR_N_MASK) != 0) {
        return MMU_TLB_MISS;
    }

    /* Check for instruction or data TBL */
    if ((vpn & AVR32_TLBEHI_I_MASK) != 0) {
        *index = 0x3F & (regValue>>AVR32_MMUCR_IRP_OFFSET);
    } else {
        *index = 0x3F & (regValue>>AVR32_MMUCR_DRP_OFFSET);
    }

    return MMU_OK;
}

int mmu_init	(	int	enable,
		int	mode,
		int	segmentation
	)

Changes mode on the MMU according to input.

This function only changes the mode, it will not invalidate all the TLB entries. If this is needed use the mmu_reset function to reset the MMU back to default setup.

Parameters:

	enable	enable or disable the MMU MMU_ENABLE MMU_DISABLE
	mode	Set the MMU in private virtual mode or 1-shared virtual mode MMU_PRIVATE_VIRTUAL_MODE MMU_SHARED_VIRTUAL_MODE
	segmentation	Turns on or off segmentation MMU_SEGMENTATION_ON MMU_SEGMENTATION_OFF

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR	if unable to initialize the MMU

Definition at line 81 of file mmu.c.

References AVR32_READ_SR_REG, AVR32_SET_SR_REG, MMU_ERROR, and MMU_OK.

{
    long regval = 0;
    long regval_read = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regval);

    regval = (enable<<AVR32_MMUCR_E_OFFSET)|
        (mode<<AVR32_MMUCR_M_OFFSET)|
        (segmentation<<AVR32_MMUCR_S_OFFSET);

    AVR32_SET_SR_REG(AVR32_MMUCR, regval);

    AVR32_READ_SR_REG(AVR32_MMUCR, regval_read);

    if (regval != regval_read) {
        return MMU_ERROR;
    }

    return MMU_OK;
}

int mmu_invalidate_entry	(	int	index,
		int	type
	)

Invalidates an entry in the TLB.

Parameters:

	index	the TLB index of the entry to be invalidated
	type	data or instruction entries to invalidate MMU_TLB_TYPE_INSTRUCTION MMU_TLB_TYPE_DATA

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR_ARGUMENT	on invalid argument

Definition at line 470 of file mmu.c.

References AVR32_CLEAR_SR_BIT, AVR32_READ_SR_REG, AVR32_SET_SR_REG, MMU_ERROR_ARGUMENT, MMU_OK, MMU_TLB_TYPE_DATA, and MMU_TLB_TYPE_INSTRUCTION.

{
    if (index < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              index >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              index >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if (type == MMU_TLB_TYPE_INSTRUCTION) {
        regValue &= ~(0x3F<<AVR32_MMUCR_IRP_OFFSET);
        regValue |= (index<<AVR32_MMUCR_IRP_OFFSET);
    } else {
        regValue &= ~(0x3F<<AVR32_MMUCR_DRP_OFFSET);
        regValue |= (index<<AVR32_MMUCR_DRP_OFFSET);
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);

#ifdef __GNUC__
    __builtin_tlbr();
#elif __ICCAVR32__
    __read_TLB_entry();
#else
#error No known compiler used
#endif

    AVR32_CLEAR_SR_BIT(AVR32_TLBEHI, AVR32_TLBEHI_V_OFFSET);

#ifdef __GNUC__
    __builtin_tlbw();
#elif __ICCAVR32__
    __write_TLB_entry();
#else
#error No known compiler used
#endif

    return MMU_OK;
}

int mmu_lock_entries	(	int	entries,
		int	type
	)

Locks a specified number of entries.

Parameters:

	entries	number of entries to lock
	type	data or instruction entries to lock MMU_TLB_TYPE_DATA MMU_TLB_TYPE_INSTRUCTION

Definition at line 266 of file mmu.c.

References AVR32_READ_SR_REG, AVR32_SET_SR_REG, MMU_ERROR_ARGUMENT, MMU_OK, MMU_TLB_TYPE_DATA, and MMU_TLB_TYPE_INSTRUCTION.

{
    if (entries < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              entries >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              entries >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if (type == MMU_TLB_TYPE_INSTRUCTION) {
        regValue &= ~(AVR32_MMUCR_ILA_MASK);
        regValue |= (entries<<AVR32_MMUCR_ILA_OFFSET);
    } else {
        regValue &= ~(AVR32_MMUCR_DLA_MASK);
        regValue |= (entries<<AVR32_MMUCR_DLA_OFFSET);
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);

    return MMU_OK;
}

void mmu_read_bear_and_tlbehi	(	long *	bear,
		long *	vpn
	)

Reads the TLBEAR and TLBEHI registers and place the contents in bear and vpn.

Parameters:

	bear	pointer to where to put the TLBEAR data
	vpn	pointer to where to put the TLBEHI data

Definition at line 406 of file mmu.c.

References AVR32_READ_SR_REG.

{
    AVR32_READ_SR_REG(AVR32_TLBEAR, *bear);
    AVR32_READ_SR_REG(AVR32_TLBEHI, *vpn);
}

int mmu_reset

(

)

Resets the MMU and invalidates all TLB entries.

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR	if unable to reset the MMU

Definition at line 110 of file mmu.c.

References AVR32_READ_SR_REG, AVR32_SET_SR_REG, MMU_ERROR, and MMU_OK.

{
    long regval;
    int timer = 10;

    AVR32_SET_SR_REG(AVR32_MMUCR, AVR32_MMUCR_S_MASK|AVR32_MMUCR_I_MASK);

    /* Wait for invalidation of MMU entries */
    do {
        AVR32_READ_SR_REG(AVR32_MMUCR, regval);
        --timer;
    } while ((regval & AVR32_MMUCR_I_MASK) != 0 && timer > 0);

    if (regval != AVR32_MMUCR_S_MASK || timer == 0) {
        return MMU_ERROR;
    }

    AVR32_SET_SR_REG(AVR32_TLBARHI, 0);
    AVR32_SET_SR_REG(AVR32_TLBARLO, 0);

    return MMU_OK;
}

int mmu_search_physical_ptr	(	void *	physical_ptr,
		long *	virtual_addr
	)

Search a physical address and get the virtual address from the TLB. The function searches the data TLBs first before searching the instruction TLBs.

Parameters:

	physical_ptr	the physical address to search for
	virtual_addr	pointer to a variable the virtual address will be written

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR_ARGUMENT	on invalid arguments
	MMU_TLB_MISS	on TLB search miss

Definition at line 210 of file mmu.c.

References mmu_get_addrmask_from_page_size(), MMU_OK, mmu_read_entry(), MMU_TLB_MISS, MMU_TLB_TYPE_DATA, and MMU_TLB_TYPE_INSTRUCTION.

{
    long addr_mask;
    long vpn;
    long pfn;
    int retval;
    int i;

    for (i = 0; i < MMU_DTLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_DATA);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)physical_ptr & addr_mask) == (pfn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *virtual_addr = (vpn & addr_mask)
                    |((long)physical_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }

    for (i = 0; i < MMU_ITLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_INSTRUCTION);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)physical_ptr & addr_mask) == (pfn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *virtual_addr = (vpn & addr_mask)
                    |((long)physical_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }


    return MMU_TLB_MISS;
}

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int mmu_search_virtual_ptr	(	void *	virtual_ptr,
		long *	physical_addr
	)

Search a virtual address and get the physical address from the TLB. The function searches the data TLBs first before searching the instruction TLBs.

Parameters:

	virtual_ptr	the virtual address to search for
	physical_addr	pointer to a variable the physical address will be written

Returns:

Status

Return values:

	MMU_OK	on success
	MMU_ERROR_ARGUMENT	on invalid arguments
	MMU_TLB_MISS	on TLB search miss

Definition at line 147 of file mmu.c.

References mmu_get_addrmask_from_page_size(), MMU_OK, mmu_read_entry(), MMU_TLB_MISS, MMU_TLB_TYPE_DATA, and MMU_TLB_TYPE_INSTRUCTION.

{
    long addr_mask;
    long vpn;
    long pfn;
    int retval;
    int i;

    for (i = 0; i < MMU_DTLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_DATA);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)virtual_ptr & addr_mask) == (vpn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *physical_addr = (pfn & addr_mask)
                    |((long)virtual_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }

    for (i = 0; i < MMU_ITLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_INSTRUCTION);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)virtual_ptr & addr_mask) == (vpn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *physical_addr = (pfn & addr_mask)
                    |((long)virtual_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }



    return MMU_TLB_MISS;
}

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