00001
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050 #ifndef _MMU_H_
00051 #define _MMU_H_
00052
00053 #include <avr32/io.h>
00054 #include "settings.h"
00055
00056 #ifdef __AVR32_AP7000__
00057 #define MMU_DTLB_ENTRIES 32
00058 #define MMU_ITLB_ENTRIES 0
00059 #elif
00060 #error Unknown CPU, MMU configuration must be added to mmu.h
00061 #endif
00062
00065 struct mmu_tlb_t {
00067 int valid;
00068
00073 int type;
00074
00078 int asid;
00079
00081 int cachable;
00082
00086 int global;
00087
00089 int bufferable;
00090
00094 int access;
00095
00097 int dirty;
00098
00100 int page_size;
00101
00105 int write_through;
00106
00108 int position;
00109 };
00110
00111
00113 enum {
00114 MMU_ERROR = -1,
00115 MMU_OK = 0,
00116 MMU_ERROR_ARGUMENT = 1,
00117 MMU_TLB_MISS = 2,
00118
00119 MMU_DISABLE = 0,
00120 MMU_ENABLE = 1,
00121 MMU_PRIVATE_VIRTUAL_MODE = 0,
00122 MMU_SHARED_VIRTUAL_MODE = 1,
00123 MMU_SEGMENTATION_OFF = 0,
00124 MMU_SEGMENTATION_ON = 1,
00125 MMU_TLB_TYPE_DATA = 0,
00126 MMU_TLB_TYPE_INSTRUCTION = 1,
00127
00128 MMU_PAGE_SIZE_1KB = 0,
00129 MMU_PAGE_SIZE_4KB = 1,
00130 MMU_PAGE_SIZE_64KB = 2,
00131 MMU_PAGE_SIZE_1MB = 3,
00132 };
00133
00134 int mmu_init(int enable, int mode, int segmentation);
00135
00136 int mmu_reset();
00137
00138 int mmu_search_virtual_ptr(void * virtual_ptr, long * physical_addr);
00139
00140 int mmu_search_physical_ptr(void * physical_ptr, long * virtual_addr);
00141
00142 int mmu_lock_entries(int entries, int type);
00143
00144 int mmu_add_tlb_entry(long physical_addr_base,
00145 long virtual_addr_base, struct mmu_tlb_t * options);
00146
00147 void mmu_read_bear_and_tlbehi(long *bear, long *vpn);
00148
00149 int mmu_find_index_to_entry(long physical_addr, long virtual_addr, long *index);
00150
00151 int mmu_invalidate_entry(int index, int type);
00152
00153 #endif
00154