mmu.c

Go to the documentation of this file.

/*This file has been prepared for Doxygen automatic documentation generation.*/
/* Copyright (c) 2006, Atmel Corporation All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * 3. The name of ATMEL may not be used to endorse or promote products derived
 * from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <avr32/io.h>
#include "mmu.h"
#include "macro.h"
#include "usart.h"

/* Prototypes for local functions */
int mmu_add_entry(long vpn, long pfn, int pos, int type);
int mmu_read_entry(long * vpn, long * pfn, int pos, int type);
int mmu_get_addrmask_from_page_size(long tlbelo, long *address_mask);


int mmu_init(int enable, int mode, int segmentation)
{
    long regval = 0;
    long regval_read = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regval);

    regval = (enable<<AVR32_MMUCR_E_OFFSET)|
        (mode<<AVR32_MMUCR_M_OFFSET)|
        (segmentation<<AVR32_MMUCR_S_OFFSET);

    AVR32_SET_SR_REG(AVR32_MMUCR, regval);

    AVR32_READ_SR_REG(AVR32_MMUCR, regval_read);

    if (regval != regval_read) {
        return MMU_ERROR;
    }

    return MMU_OK;
}


int mmu_reset()
{
    long regval;
    int timer = 10;

    AVR32_SET_SR_REG(AVR32_MMUCR, AVR32_MMUCR_S_MASK|AVR32_MMUCR_I_MASK);

    /* Wait for invalidation of MMU entries */
    do {
        AVR32_READ_SR_REG(AVR32_MMUCR, regval);
        --timer;
    } while ((regval & AVR32_MMUCR_I_MASK) != 0 && timer > 0);

    if (regval != AVR32_MMUCR_S_MASK || timer == 0) {
        return MMU_ERROR;
    }

    AVR32_SET_SR_REG(AVR32_TLBARHI, 0);
    AVR32_SET_SR_REG(AVR32_TLBARLO, 0);

    return MMU_OK;
}


int mmu_search_virtual_ptr(void *virtual_ptr, long *physical_addr)
{
    long addr_mask;
    long vpn;
    long pfn;
    int retval;
    int i;

    for (i = 0; i < MMU_DTLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_DATA);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)virtual_ptr & addr_mask) == (vpn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *physical_addr = (pfn & addr_mask)
                    |((long)virtual_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }

    for (i = 0; i < MMU_ITLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_INSTRUCTION);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)virtual_ptr & addr_mask) == (vpn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *physical_addr = (pfn & addr_mask)
                    |((long)virtual_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }



    return MMU_TLB_MISS;
}


int mmu_search_physical_ptr(void *physical_ptr, long *virtual_addr)
{
    long addr_mask;
    long vpn;
    long pfn;
    int retval;
    int i;

    for (i = 0; i < MMU_DTLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_DATA);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)physical_ptr & addr_mask) == (pfn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *virtual_addr = (vpn & addr_mask)
                    |((long)physical_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }

    for (i = 0; i < MMU_ITLB_ENTRIES; i++) {
        /* Read the TLB entry */
        retval = mmu_read_entry(&vpn, &pfn, i, MMU_TLB_TYPE_INSTRUCTION);
        if (retval != MMU_OK) {
            return retval;
        }

        retval = mmu_get_addrmask_from_page_size(pfn, &addr_mask);
        if (retval == MMU_OK) {
            if (((long)physical_ptr & addr_mask) == (pfn & addr_mask)
                    && (vpn & AVR32_TLBEHI_V_MASK)) {
                *virtual_addr = (vpn & addr_mask)
                    |((long)physical_ptr & ~addr_mask);
                return MMU_OK;
            }
        }
    }


    return MMU_TLB_MISS;
}


int mmu_lock_entries(int entries, int type)
{
    if (entries < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              entries >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              entries >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if (type == MMU_TLB_TYPE_INSTRUCTION) {
        regValue &= ~(AVR32_MMUCR_ILA_MASK);
        regValue |= (entries<<AVR32_MMUCR_ILA_OFFSET);
    } else {
        regValue &= ~(AVR32_MMUCR_DLA_MASK);
        regValue |= (entries<<AVR32_MMUCR_DLA_OFFSET);
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);

    return MMU_OK;
}


int mmu_add_tlb_entry(long physical_addr_base,
        long virtual_addr_base, struct mmu_tlb_t *options)
{
    if (!(options->valid == MMU_ENABLE
            || options->valid == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->type == MMU_TLB_TYPE_INSTRUCTION
            || options->type == MMU_TLB_TYPE_DATA)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->asid > 0xFF
            || options->asid < 0) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->cachable == MMU_ENABLE
            || options->cachable == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->global == MMU_ENABLE
            || options->global == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->bufferable == MMU_ENABLE
            || options->bufferable == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->access > 0x0D
            || options->access < 0) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->page_size == MMU_PAGE_SIZE_1KB
            || options->page_size == MMU_PAGE_SIZE_4KB
            || options->page_size == MMU_PAGE_SIZE_64KB
            || options->page_size == MMU_PAGE_SIZE_1MB)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->dirty == MMU_ENABLE
            || options->dirty == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (!(options->write_through == MMU_ENABLE
            || options->write_through == MMU_DISABLE)) {
        return MMU_ERROR_ARGUMENT;
    }
    else if (options->position < 0 ||
            ((options->type == MMU_TLB_TYPE_DATA &&
              options->position >= MMU_DTLB_ENTRIES) ||
             (options->type == MMU_TLB_TYPE_INSTRUCTION &&
              options->position >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    unsigned long vpn;
    unsigned long pfn;
    unsigned long addr_mask;

    if (options->page_size == MMU_PAGE_SIZE_1KB) {
        addr_mask = 0xFFFFFC00;
    }
    else if (options->page_size == MMU_PAGE_SIZE_4KB) {
        addr_mask = 0xFFFFF000;
    }
    else if (options->page_size == MMU_PAGE_SIZE_64KB) {
        addr_mask = 0xFFFF0000;
    }
    else if (options->page_size == MMU_PAGE_SIZE_1MB) {
        addr_mask = 0xFFF00000;
    } else {
        return MMU_ERROR_ARGUMENT;
    }

    vpn =
        (virtual_addr_base & addr_mask)|
        (options->valid<<AVR32_TLBEHI_V_OFFSET)|
        (options->type<<AVR32_TLBEHI_I_OFFSET)|
        (options->asid<<AVR32_TLBEHI_ASID_OFFSET);

    pfn =
        (physical_addr_base & addr_mask)|
        (options->cachable<<AVR32_TLBELO_C_OFFSET)|
        (options->global<<AVR32_TLBELO_G_OFFSET)|
        (options->bufferable<<AVR32_TLBELO_B_OFFSET)|
        (options->access<<AVR32_TLBELO_AP_OFFSET)|
        (options->page_size<<AVR32_TLBELO_SZ_OFFSET)|
        (options->dirty<<AVR32_TLBELO_D_OFFSET)|
        (options->write_through<<AVR32_TLBELO_W_OFFSET);

    int retVal = MMU_OK;

    retVal = mmu_add_entry(vpn, pfn, options->position, options->type);

    return retVal;
}


void mmu_read_bear_and_tlbehi(long *bear, long *vpn)
{
    AVR32_READ_SR_REG(AVR32_TLBEAR, *bear);
    AVR32_READ_SR_REG(AVR32_TLBEHI, *vpn);
}


int mmu_find_index_to_entry(long physical_addr, long virtual_addr, long *index)
{
    long vpn = virtual_addr & 0xFFFFfc00;
    long pfn = physical_addr & 0xFFFFfc00;

    AVR32_SET_SR_REG(AVR32_TLBEHI, vpn);
    AVR32_SET_SR_REG(AVR32_TLBELO, pfn);

#ifdef __GNUC__
    __builtin_tlbs();
#elif __ICCAVR32__
    __search_TLB_entry();
#else
#error No known compiler used
#endif

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if ((regValue & AVR32_MMUCR_N_MASK) != 0) {
        return MMU_TLB_MISS;
    }

    /* Check for instruction or data TBL */
    if ((vpn & AVR32_TLBEHI_I_MASK) != 0) {
        *index = 0x3F & (regValue>>AVR32_MMUCR_IRP_OFFSET);
    } else {
        *index = 0x3F & (regValue>>AVR32_MMUCR_DRP_OFFSET);
    }

    return MMU_OK;
}


int mmu_invalidate_entry(int index, int type)
{
    if (index < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              index >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              index >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if (type == MMU_TLB_TYPE_INSTRUCTION) {
        regValue &= ~(0x3F<<AVR32_MMUCR_IRP_OFFSET);
        regValue |= (index<<AVR32_MMUCR_IRP_OFFSET);
    } else {
        regValue &= ~(0x3F<<AVR32_MMUCR_DRP_OFFSET);
        regValue |= (index<<AVR32_MMUCR_DRP_OFFSET);
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);

#ifdef __GNUC__
    __builtin_tlbr();
#elif __ICCAVR32__
    __read_TLB_entry();
#else
#error No known compiler used
#endif

    AVR32_CLEAR_SR_BIT(AVR32_TLBEHI, AVR32_TLBEHI_V_OFFSET);

#ifdef __GNUC__
    __builtin_tlbw();
#elif __ICCAVR32__
    __write_TLB_entry();
#else
#error No known compiler used
#endif

    return MMU_OK;
}


int mmu_add_entry(long vpn, long pfn, int pos, int type)
{

    if (pos < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              pos >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              pos >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    long regValue = 0;

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    regValue &= 0x0000001F;

    if (type == MMU_TLB_TYPE_INSTRUCTION) {
        regValue |= (pos<<AVR32_MMUCR_IRP_OFFSET);
    }
    else if (type == MMU_TLB_TYPE_DATA) {
        regValue |= (pos<<AVR32_MMUCR_DRP_OFFSET);
    } else {
        return MMU_ERROR_ARGUMENT;
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);
    AVR32_SET_SR_REG(AVR32_TLBEHI, vpn);
    AVR32_SET_SR_REG(AVR32_TLBELO, pfn);

#ifdef __GNUC__
    __builtin_tlbw();
#elif __ICCAVR32__
    __write_TLB_entry();
#else
#error No known compiler used
#endif

    return MMU_OK;
}


int mmu_read_entry(long *vpn, long *pfn, int pos, int type)
{
    long regValue = 0;
    if (pos < 0 ||
            ((type == MMU_TLB_TYPE_DATA &&
              pos >= MMU_DTLB_ENTRIES) ||
             (type == MMU_TLB_TYPE_INSTRUCTION &&
              pos >= MMU_ITLB_ENTRIES))) {
        return MMU_ERROR_ARGUMENT;
    }

    AVR32_READ_SR_REG(AVR32_MMUCR, regValue);

    if (type== MMU_TLB_TYPE_INSTRUCTION) {
        regValue &= ~(0x3F<<AVR32_MMUCR_IRP_OFFSET);
        regValue |= (pos<<AVR32_MMUCR_IRP_OFFSET);
    } else {
        regValue &= ~(0x3F<<AVR32_MMUCR_DRP_OFFSET);
        regValue |= (pos<<AVR32_MMUCR_DRP_OFFSET);
    }

    AVR32_SET_SR_REG(AVR32_MMUCR, regValue);

#ifdef __GNUC__
    __builtin_tlbr();
#elif __ICCAVR32__
    __read_TLB_entry();
#else
#error No known compiler used
#endif

    AVR32_READ_SR_REG(AVR32_TLBEHI, *vpn);
    AVR32_READ_SR_REG(AVR32_TLBELO, *pfn);

    return MMU_OK;
}


int mmu_get_addrmask_from_page_size(long tlbelo, long *address_mask)
{
    int page_size = (tlbelo & AVR32_TLBELO_SZ_MASK) >> AVR32_TLBELO_SZ_OFFSET;

    if (page_size == MMU_PAGE_SIZE_1KB) {
        *address_mask = 0xFFFFfc00;
    }
    else if (page_size == MMU_PAGE_SIZE_4KB) {
        *address_mask = 0xFFFFf000;
    }
    else if (page_size == MMU_PAGE_SIZE_64KB) {
        *address_mask = 0xFFFF0000;
    }
    else if (page_size == MMU_PAGE_SIZE_1MB) {
        *address_mask = 0xFFF00000;
    } else {
        return MMU_ERROR_ARGUMENT;
    }

    return MMU_OK;
}

---