pdc.c

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/* Copyright (c) 2006, Atmel Corporation All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * 3. The name of ATMEL may not be used to endorse or promote products derived
 * from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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 */

#include "pdc.h"

#define PDC_TXTDIS_OFFSET   9
#define PDC_TXTEN_OFFSET    8
#define PDC_RXTDIS_OFFSET   1
#define PDC_RXTEN_OFFSET    0

struct peripheral_t
{
    /* 0x00 */
    volatile       unsigned long _reserved[64];
    /* 0x100 PDC start */
    volatile       unsigned long rpr;
    volatile       unsigned long rcr;
    volatile       unsigned long tpr;
    volatile       unsigned long tcr;
    volatile       unsigned long rnpr;
    volatile       unsigned long rncr;
    volatile       unsigned long tnpr;
    volatile       unsigned long tncr;
    volatile       unsigned long ptcr;
    volatile const unsigned long ptsr;
};


void pdc_disable(void * dev)
{
    /* Disable RX and TX */
    ((struct peripheral_t *)dev)->ptcr =
        (1<<PDC_RXTDIS_OFFSET)|(1<<PDC_TXTDIS_OFFSET);
}


void pdc_enable(void * dev)
{
    /* Enable RX and TX */
    ((struct peripheral_t *)dev)->ptcr =
        (1<<PDC_RXTEN_OFFSET)|(1<<PDC_TXTEN_OFFSET);
}


void pdc_disableRx(void * dev)
{
    /* Disable RX */
    ((struct peripheral_t *)dev)->ptcr = (1<<PDC_RXTDIS_OFFSET);
}


void pdc_disableTx(void * dev)
{
    /* Disable TX */
    ((struct peripheral_t *)dev)->ptcr = (1<<PDC_TXTDIS_OFFSET);
}


void pdc_enableRx(void * dev)
{
    /* Enable RX */
    ((struct peripheral_t *)dev)->ptcr = (1<<PDC_RXTEN_OFFSET);
}


void pdc_enableTx(void * dev)
{
    ((struct peripheral_t *)dev)->ptcr = (1<<PDC_TXTEN_OFFSET);
}


void pdc_setRxBuf(void * dev,
        void * rp,
        unsigned short rc,
        void * rnp,
        unsigned short rnc)
{
    pdc_disableRx(dev);

    if (rp == 0 || rc == 0) {
        return;
    }

    ((struct peripheral_t *)dev)->rpr = (long)rp;
    ((struct peripheral_t *)dev)->rcr = rc;

    if (rnp != 0) {
        ((struct peripheral_t *)dev)->rnpr = (long)rnp;
        ((struct peripheral_t *)dev)->rncr = rnc;
    }

    pdc_enableRx(dev);

    return;
}


void pdc_setRxNextBuf(void * dev,
        void * rnp,
        unsigned short rnc)
{
    if (rnp == 0 || rnc == 0) {
        return;
    }

    ((struct peripheral_t *)dev)->rnpr = (long)rnp;
    ((struct peripheral_t *)dev)->rncr = rnc;

    return;
}


void pdc_setTxBuf(void * dev,
        void * tp,
        unsigned short tc,
        void * tnp,
        unsigned short tnc)
{
    pdc_disableTx(dev);

    if (tp == 0 || tc == 0) {
        return;
    }

    ((struct peripheral_t *)dev)->tpr = (long)tp;
    ((struct peripheral_t *)dev)->tcr = tc;

    if (tnp != 0) {
        ((struct peripheral_t *)dev)->tnpr = (long)tnp;
        ((struct peripheral_t *)dev)->tncr = tnc;
    }

    pdc_enableTx(dev);

    return;
}


void pdc_setTxNextBuf(void * dev,
        void * tnp,
        unsigned short tnc)
{
    if (tnp == 0 || tnc == 0) {
        return;
    }

    ((struct peripheral_t *)dev)->tnpr = (long)tnp;
    ((struct peripheral_t *)dev)->tncr = tnc;

    return;
}


int pdc_getRcr(void * dev)
{
    int bytes = 0;
    bytes += ((struct peripheral_t *)dev)->rcr;

    return bytes;
}


int pdc_rxBytesLeft(void * dev)
{
    int bytes = 0;
    bytes += ((struct peripheral_t *)dev)->rcr;
    bytes += ((struct peripheral_t *)dev)->rncr;

    return bytes;
}


int pdc_getTcr(void * dev)
{
    int bytes = 0;
    bytes += ((struct peripheral_t *)dev)->tcr;

    return bytes;
}


int pdc_txBytesLeft(void * dev)
{
    int bytes = 0;
    bytes += ((struct peripheral_t *)dev)->tcr;
    bytes += ((struct peripheral_t *)dev)->tncr;

    return bytes;
}


void pdc_flushCache(void * buffer, unsigned short size)
{
    unsigned int i;
    long memoryAddress = (long) buffer;

    for (i = 0; i < size; ++i) {
#ifdef __GNUC__
        __builtin_cache((void *)memoryAddress, 0x0C);
#elif __ICCAVR32__
        __cache_control((void *)memoryAddress, 0x0C);
#else
#error No valid compiler for pdc_flushCache() function
#endif

        memoryAddress += 32;
    }
}


void * pdc_translatePtr(void *pointerAddr)
{
    unsigned long returnAddress = (unsigned long) pointerAddr;

    /* Mapping between virtual address and physical address when the
     * MCU has been reset, and the MMU is not being used, is done by
     * clearing MSB in the memory address.
     *
     * For more details conserning the MMU see application note
     * AVR32113 Configuration and Use of the Memory Managment Unit.
     */
    returnAddress &= ~(0x80000000);

    return (void *) returnAddress;
}

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