This file contains basic drivers for the AVR32 TWI, with support for all master modes, TWI settings and clock speeds.
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Definition in file twi.c.
#include "twi.h"

Go to the source code of this file.
Functions | |
| int | twi_init (struct twi_options_t *opt) |
| int | twi_probe (char chip_addr) |
| int | twi_read (struct twi_package_t *package) |
| int | twi_set_speed (unsigned int speed, unsigned long cpu_hz) |
| int | twi_write (struct twi_package_t *package) |
| int twi_init | ( | struct twi_options_t * | opt | ) |
twi_init: - Initialize the twi module
| *opt | Options for initializing the twi module (see twi_options_t) |
Definition at line 88 of file twi.c.
Referenced by main().
00089 { 00090 00091 volatile avr32_twi_t *twi = &AVR32_TWI; 00092 00093 /* Reset, enable master transfer and disable slave transfer */ 00094 twi->cr = // (1<<AVR32_TWI_CR_SWRST_OFFSET) | 00095 (1<<AVR32_TWI_CR_MSEN_OFFSET); 00096 twi->iadr = opt->twi_addr; 00097 00098 return twi_set_speed(opt->speed, opt->cpu_hz); 00099 00100 }
| int twi_probe | ( | char | chip_addr | ) |
twi_probe: - Test if a chip answers for a given twi address
| chip_addr,: | address of the chip which is searched for |
Definition at line 102 of file twi.c.
00103 { 00104 volatile avr32_twi_t *twi = &AVR32_TWI; 00105 int timeout = TWI_TIMEOUT; 00106 00107 twi->mmr = (chip_addr << 16) | (1<<AVR32_TWI_MMR_MREAD_OFFSET); 00108 twi->iadr = 0; 00109 twi->cr = (1<<AVR32_TWI_CR_START_OFFSET) | (1<<AVR32_TWI_CR_STOP_OFFSET); 00110 00111 do { 00112 if ((twi->sr) & (1<<AVR32_TWI_SR_RXRDY_OFFSET)) 00113 { 00114 return TWI_SUCCESS; 00115 } 00116 } while (!(twi->sr & (1<<AVR32_TWI_SR_TXCOMP_OFFSET)) && --timeout); 00117 00118 return TWI_NO_CHIP_FOUND; 00119 }
| int twi_read | ( | struct twi_package_t * | package | ) |
twi_read: - Read multiple bytes from a another twi compatible device
| package | Package information and data (see twi_package_t) |
Definition at line 121 of file twi.c.
Referenced by main().
00122 { 00123 volatile avr32_twi_t *twi = &AVR32_TWI; 00124 unsigned int i = 0; 00125 unsigned int timeout = TWI_TIMEOUT; 00126 00127 if (package->length == 0) 00128 { 00129 return TWI_INVALID_ARGUMENT; 00130 } 00131 00132 /* clear buffer for data */ 00133 for (i = 0; i< package->length; i++) 00134 package->buffer[i] = '_'; 00135 i=0; 00136 00137 twi->mmr = (package->chip << AVR32_TWI_MMR_DADR_OFFSET) | 00138 ((package->addr_length &3) << 8) | 00139 (1<<AVR32_TWI_MMR_MREAD_OFFSET); 00140 twi->iadr = package->addr; 00141 00142 /* send start condition */ 00143 twi->cr = (1<<AVR32_TWI_CR_START_OFFSET); 00144 00145 00146 /* get data */ 00147 while (i < package->length){ 00148 if (twi->sr & (1<<AVR32_TWI_SR_RXRDY_OFFSET)){ 00149 package->buffer[i++] = twi->rhr; /*put the byte in the receive holding register */ 00150 //print(usart, "got one byte\n"); 00151 } 00152 00153 /* Wait for ACK */ 00154 while (!(twi->sr & (1<<AVR32_TWI_SR_RXRDY_OFFSET)) && (--timeout)); 00155 00156 /* Check for timeout */ 00157 if(timeout==0){ 00158 return TWI_RECEIVE_NACK; 00159 } 00160 00161 timeout=TWI_TIMEOUT; /* reset timer */ 00162 } /* end while loop */ 00163 00164 /* send stop condition */ 00165 twi->cr |= (1<<AVR32_TWI_CR_STOP_OFFSET); 00166 00167 /* add terminating char */ 00168 package->buffer[i++] = '\0'; 00169 00170 if (twi->sr & (1<<AVR32_TWI_SR_NACK_OFFSET)) 00171 return TWI_RECEIVE_NACK; 00172 00173 if (i < package->length) 00174 return TWI_INVALID_ARGUMENT; 00175 return i; 00176 }
| int twi_set_speed | ( | unsigned int | speed, | |
| unsigned long | cpu_hz | |||
| ) |
Definition at line 68 of file twi.c.
References TWI_SUCCESS.
Referenced by twi_init().
00069 { 00070 volatile avr32_twi_t *twi = &AVR32_TWI; 00071 unsigned int cldiv; 00072 unsigned int ckdiv = 0; 00073 00074 cldiv = cpu_hz / (speed * 2) - 4; 00075 00076 while (cldiv > 255) 00077 { 00078 ckdiv++; 00079 cldiv /= 2; 00080 } 00081 00082 twi->cwgr = ( cldiv | (cldiv << 8) | (ckdiv << 16) ); 00083 00084 return TWI_SUCCESS; 00085 00086 }
| int twi_write | ( | struct twi_package_t * | package | ) |
Definition at line 179 of file twi.c.
Referenced by main().
00180 { 00181 volatile avr32_twi_t *twi = &AVR32_TWI; 00182 int i = 0; 00183 int timeout = TWI_TIMEOUT; 00184 00185 /* No data to send */ 00186 if (package->length == 0) 00187 { 00188 return TWI_INVALID_ARGUMENT; 00189 } 00190 00191 twi->cr |= (0<<AVR32_TWI_CR_MSDIS_OFFSET); 00192 00193 /* set slave address and 3 internal address byte length */ 00194 twi->mmr = (0<<AVR32_TWI_MMR_MREAD_OFFSET) | \ 00195 (package->chip << AVR32_TWI_MMR_DADR_OFFSET) | \ 00196 ((package->addr_length & 3) << 8); 00197 /* set internal address for remote chip */ 00198 twi->iadr = package->addr; 00199 00200 /* set start condition */ 00201 twi->cr |= (1<<AVR32_TWI_CR_START_OFFSET); 00202 00203 /* send data*/ 00204 while (i < package->length){ 00205 00206 if (twi->sr & (1<<AVR32_TWI_SR_TXRDY_OFFSET)) 00207 twi->thr = package->buffer[i++]; /*put the byte in the transmit holding register */ 00208 00209 /* Wait for ACK */ 00210 while (!(twi->sr & (1<<AVR32_TWI_SR_TXCOMP_OFFSET)) && timeout--); 00211 00212 if(timeout==0) 00213 return TWI_RECEIVE_NACK; 00214 00215 timeout=TWI_TIMEOUT; /* reset timer */ 00216 00217 } 00218 00219 00220 /* set stop condition */ 00221 twi->cr |= (1<<AVR32_TWI_CR_STOP_OFFSET); 00222 00223 /* NACK */ 00224 if (twi->sr & (1<<AVR32_TWI_SR_NACK_OFFSET)) 00225 return TWI_SEND_NACK; 00226 00227 /* not all bytes were sent */ 00228 if (i < package->length) 00229 { 00230 /* TIMEOUT */ 00231 return TWI_INVALID_ARGUMENT; 00232 } 00233 00234 /* Everything went ok */ 00235 00236 return i; 00237 }
1.5.3