Defines | Functions

Watchdog and reset sytem drivers

Defines

#define Is_ext_reset()   ((MCUSR&(1<<EXTRF)) ? TRUE:FALSE)
#define Ack_ext_reset()   (MCUSR= ~(1<<EXTRF))
#define Is_POR_reset()   ((MCUSR&(1<<(MCUSR= ~(1<<PORF)))) ? TRUE:FALSE)
#define Ack_POR_reset()   (MCUSR= ~(1<<PORF))
#define Is_BOD_reset()   ((MCUSR&(1<<BORF)) ? TRUE:FALSE)
#define Ack_BOD_reset()   (MCUSR= ~(1<<BORF))
#define Is_wdt_reset()   ((MCUSR&(1<<WDRF)) ? TRUE:FALSE)
#define Ack_wdt_reset()   (MCUSR= ~(1<<WDRF))
#define Wdt_ack_interrupt()   (WDTCSR = (U8)(1<<WDIF))
#define Is_wdt_interrupt()   (WDTCSR&(1<<WDIF) ? TRUE:FALSE)
#define Is_not_wdt_interrupt()   (WDTCSR&(1<<WDIF) ? FALSE:TRUE)
#define Is_wdt_early_warning()   (WDTCKD&(1<<WDEWIF) ? TRUE:FALSE)
#define Is_not_wdt_early_warning()   (WDTCKD&(1<<WDEWIF) ? FALSE:TRUE)
#define WDTO_16MS   0
#define WDTO_32MS   1
#define WDTO_64MS   2
#define WDTO_125MS   3
#define WDTO_250MS   4
#define WDTO_500MS   5
#define WDTO_1S   6
#define WDTO_2S   7
#define WDTO_4S   8
#define WDTO_8S   9
#define Soft_reset()   {asm("jmp 0000");}

Functions

void wdtdrv_disable (void)
 This functions stops the hardware watchdog timer.
void wdtdrv_enable (U8 timeout)
 This functions activates the hardware watchdog timer.
void wdtdrv_interrupt_enable (U8 timeout)
 This functions activates the hardware watchdog timer Interrupt Mode only.
void wdtdrv_interrupt_reset_enable (U8 timeout)
 This functions activates the hardware watchdog timer Interrupt & System Reset Mode.

Define Documentation

#define Is_ext_reset (  )    ((MCUSR&(1<<EXTRF)) ? TRUE:FALSE)

Definition at line 60 of file wdt_drv.h.

#define Ack_ext_reset (  )    (MCUSR= ~(1<<EXTRF))

Definition at line 61 of file wdt_drv.h.

#define Is_POR_reset (  )    ((MCUSR&(1<<(MCUSR= ~(1<<PORF)))) ? TRUE:FALSE)

Definition at line 62 of file wdt_drv.h.

#define Ack_POR_reset (  )    (MCUSR= ~(1<<PORF))

Definition at line 63 of file wdt_drv.h.

#define Is_BOD_reset (  )    ((MCUSR&(1<<BORF)) ? TRUE:FALSE)

Definition at line 64 of file wdt_drv.h.

#define Ack_BOD_reset (  )    (MCUSR= ~(1<<BORF))

Definition at line 65 of file wdt_drv.h.

#define Is_wdt_reset (  )    ((MCUSR&(1<<WDRF)) ? TRUE:FALSE)

Definition at line 66 of file wdt_drv.h.

#define Ack_wdt_reset (  )    (MCUSR= ~(1<<WDRF))
#define Wdt_ack_interrupt (  )    (WDTCSR = (U8)(1<<WDIF))

Definition at line 69 of file wdt_drv.h.

#define Is_wdt_interrupt (  )    (WDTCSR&(1<<WDIF) ? TRUE:FALSE)

Definition at line 70 of file wdt_drv.h.

#define Is_not_wdt_interrupt (  )    (WDTCSR&(1<<WDIF) ? FALSE:TRUE)

Definition at line 71 of file wdt_drv.h.

#define Is_wdt_early_warning (  )    (WDTCKD&(1<<WDEWIF) ? TRUE:FALSE)

Definition at line 72 of file wdt_drv.h.

#define Is_not_wdt_early_warning (  )    (WDTCKD&(1<<WDEWIF) ? FALSE:TRUE)

Definition at line 73 of file wdt_drv.h.

#define WDTO_16MS   0

Definition at line 75 of file wdt_drv.h.

#define WDTO_32MS   1

Definition at line 76 of file wdt_drv.h.

#define WDTO_64MS   2

Definition at line 77 of file wdt_drv.h.

#define WDTO_125MS   3

Definition at line 78 of file wdt_drv.h.

#define WDTO_250MS   4

Definition at line 79 of file wdt_drv.h.

#define WDTO_500MS   5

Definition at line 80 of file wdt_drv.h.

Referenced by start_boot().

#define WDTO_1S   6

Definition at line 81 of file wdt_drv.h.

#define WDTO_2S   7

Definition at line 82 of file wdt_drv.h.

#define WDTO_4S   8

Definition at line 83 of file wdt_drv.h.

#define WDTO_8S   9

Definition at line 84 of file wdt_drv.h.

#define Soft_reset (  )    {asm("jmp 0000");}

Definition at line 113 of file wdt_drv.h.


Function Documentation

void wdtdrv_disable ( void   )

This functions stops the hardware watchdog timer.

Definition at line 64 of file wdt_drv.c.

References Ack_wdt_reset, and Wdt_reset_instruction.

Referenced by main().

{
   U8 save_int=Get_interrupt_state();
   Disable_interrupt();
#ifdef  __GNUC__
   Ack_wdt_reset();
   wdt_disable();
#else
   Ack_wdt_reset();
   Wdt_reset_instruction();
   WDTCSR = (1<<WDCE) | (1<<WDE);
   WDTCSR = 0x00;
#endif
   if(save_int) { Enable_interrupt(); }
}

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void wdtdrv_enable ( U8  timeout )

This functions activates the hardware watchdog timer.

Parameters:
timeout(WDTO_x)

This functions activates the hardware watchdog timer.

Parameters:
timeout(WDTO_x)

Definition at line 89 of file wdt_drv.c.

References Ack_wdt_reset, and Wdt_reset_instruction.

Referenced by start_boot().

{
   U8 save_int=Get_interrupt_state();
   Disable_interrupt();
#ifdef  __GNUC__
   Ack_wdt_reset();
   wdt_enable(timeout);
#else
   timeout = (1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
   Disable_interrupt();
   Wdt_reset_instruction();
   WDTCSR = (1<<WDCE) | (1<<WDE);
   WDTCSR = timeout;
#endif
   if(save_int) { Enable_interrupt(); }
}

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void wdtdrv_interrupt_enable ( U8  timeout )

This functions activates the hardware watchdog timer Interrupt Mode only.

Parameters:
timeout(WDTO_x)

Definition at line 115 of file wdt_drv.c.

References Ack_wdt_reset, and Wdt_reset_instruction.

{
   U8 save_int=Get_interrupt_state();
#ifdef  __GNUC__
   Ack_wdt_reset();
    __asm__ __volatile__ (  \
        "in __tmp_reg__,__SREG__" "\n\t"    \
        "cli" "\n\t"    \
        "wdr" "\n\t"    \
        "sts %0,%1" "\n\t"  \
        "out __SREG__,__tmp_reg__" "\n\t"   \
        "sts %0,%2" \
        : /* no outputs */  \
        : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
        "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
        "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
            _BV(WDIE) | (timeout & 0x07)) ) \
        : "r0"  \
    );
#else
   timeout = (1<<WDIE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
   Disable_interrupt();
   Wdt_reset_instruction();
   WDTCSR = (1<<WDCE) | (1<<WDE);
   WDTCSR = timeout;
#endif
   if(save_int) { Enable_interrupt(); }
}
void wdtdrv_interrupt_reset_enable ( U8  timeout )

This functions activates the hardware watchdog timer Interrupt & System Reset Mode.

Parameters:
timeout(WDTO_x)

Definition at line 153 of file wdt_drv.c.

References Ack_wdt_reset, and Wdt_reset_instruction.

{
   U8 save_int=Get_interrupt_state();
   Disable_interrupt();
#ifdef  __GNUC__
   Ack_wdt_reset();
    __asm__ __volatile__ (  \
        "in __tmp_reg__,__SREG__" "\n\t"    \
        "cli" "\n\t"    \
        "wdr" "\n\t"    \
        "sts %0,%1" "\n\t"  \
        "out __SREG__,__tmp_reg__" "\n\t"   \
        "sts %0,%2" \
        : /* no outputs */  \
        : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
        "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \
        "r" ((uint8_t) ((timeout & 0x08 ? _WD_PS3_MASK : 0x00) | \
            _BV(WDE) | _BV(WDIE) | (timeout & 0x07)) ) \
        : "r0"  \
    );
#else
   timeout = (1<<WDIE)|(1<<WDE)| (timeout & 0x08 ? (1<<WDP3) : 0x00) | (timeout & 0x07);
   Disable_interrupt();
   Wdt_reset_instruction();
   WDTCSR = (1<<WDCE) | (1<<WDE);
   WDTCSR = timeout;
#endif
   if(save_int) { Enable_interrupt(); }
}