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timerhs_drv.h

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00001 /*This file is prepared for Doxygen automatic documentation generation.*/
00013 
00014 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions are met:
00018  *
00019  * 1. Redistributions of source code must retain the above copyright notice,
00020  * this list of conditions and the following disclaimer.
00021  *
00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
00023  * this list of conditions and the following disclaimer in the documentation
00024  * and/or other materials provided with the distribution.
00025  *
00026  * 3. The name of Atmel may not be used to endorse or promote products derived
00027  * from this software without specific prior written permission.
00028  *
00029  * 4. This software may only be redistributed and used in connection with an Atmel
00030  * AVR product.
00031  *
00032  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00033  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00034  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
00035  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
00036  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00037  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00038  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00039  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00040  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00041  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00042  */
00043 
00044 #ifndef _TIMERHS_DRV_H_
00045 #define _TIMERHS_DRV_H_
00046 
00047 //_____ I N C L U D E S ________________________________________________________
00048 
00049 #include "config.h"
00050 
00051 //_____ G E N E R A L    D E F I N I T I O N S _________________________________
00052 
00053    // IAR 5.11B patch ...
00054    #ifndef COM4D1
00055       #define COM4D1 3
00056    #endif
00057    #ifndef COM4D0
00058       #define COM4D0 2
00059    #endif
00060    //End IAR 5.11B patch
00061 
00062 
00063 //_____ M A C R O S ____________________________________________________________
00064 
00065     // ---------- To order the loading (reading) of 16-bit registers
00066 #define Timerhs_get_counter()       ( timerhs_get_counter() )        // c.f. "timerhs_drv.c" file
00067 #define Timerhs_get_capture()       ( timerhs_get_capture() )        // c.f. "timerhs_drv.c" file
00068     // ---------- Two ways to have a look on the things
00069 #define Timerhs_set_pwm_a(value)    ( Timerhs_set_compare_a(value) ) // c.f. above !
00070 #define Timerhs_set_pwm_b(value)    ( Timerhs_set_compare_b(value) ) // c.f. above !
00071 #define Timerhs_set_pwm_c(value)    ( Timerhs_set_compare_c(value) ) // c.f. above !
00072 #define Timerhs_get_pwm_a()         ( Timerhs_get_compare_a() )      // c.f. above !
00073 #define Timerhs_get_pwm_b()         ( Timerhs_get_compare_b() )      // c.f. above !
00074 #define Timerhs_get_pwm_c()         ( Timerhs_get_compare_c() )      // c.f. above !
00075     // ---------- If no clock, the timer is off !
00076 #define Timerhs_off()                 Timerhs_set_clock(TIMER16_NO_CLOCK)
00077 
00078 //_____ D E F .  &   M A C R O S   for   H W   C O N F . _______________________
00079 
00080     //----- CARE WITH THE ORDER WHEN 16-BIT REGISTERS ARE READ
00081     //      ==================================================
00082     //----- For sensitive 16-bit registers (c.f. temporary reg), the macros are:
00083     //-----     *  Timerhs_get_nnn_low()
00084     //-----     *  Timerhs_get_nnn_high()
00085     //----- For instance, in your main, do not write:
00086     //-----     short_temp = ((Timerhs_get_nnn_high())<<8) | (Timerhs_get_nnn_low());
00087     //-----   or
00088     //-----     short_temp = (Timerhs_get_nnn_low()) | ((Timerhs_get_nnn_high())<<8);
00089     //-----   because IAR and ImageCraft doesn't evaluate the operandes in the same order!
00090     //-----
00091     //----- The good way to write a READ (load) sequence is in 2 times:
00092     //-----     short_temp  =  Timerhs_get_nnn_low();
00093     //-----     short_temp |= (Timerhs_get_nnn_high() << 8 );
00094     //-----
00095     //----- Otherwise a macro "Timerhs_get_nnn()" exits and call "timerhs_get_counter()" function
00096 
00097     // ---------- Macros
00098 #       define Timerhs_clear()  ( TCCR4B=0, TCCR4A=0, TCCR4C=0, TCCR4D=0, TCCR4E=0,TC4H=0, TCNT4= 0,\
00099                                   TC4H=0, OCR4A=0, \
00100                                   TC4H=0, OCR4B=0, \
00101                                   TC4H=0, OCR4D=0\
00102                                 )
00103         // ----------
00104 #       define Timerhs_set_synchronous_mode()   PLL_SET_HS_TMR_PSCAL_NULL
00105 
00106 
00107         // ----------
00108 #       define Timerhs_set_counter(value)       ( TC4H = ((U8)((value)>>8)), TCNT4L = ((U8)(value)))
00109 #       define Timerhs_get_counter_low()        ((U16)(TCNT4))
00110 #       define Timerhs_get_counter_high()       ((U16)(TC4H))
00111         // ----------
00112 #       define Timerhs_set_compare_a(value)     ( TC4H = ((U16)((value)>>8)), OCR4A = ((U8)(value)))
00113 #       define Timerhs_set_compare_b(value)     ( TC4H = ((U16)((value)>>8)), OCR4B = ((U8)(value)))
00114 #       define Timerhs_set_compare_c(value)     ( TC4H = ((U16)((value)>>8)), OCR4C = ((U8)(value)))
00115 #       define Timerhs_set_top(value)           Timerhs_set_compare_c(value)
00116 #       define Timerhs_set_nb_bit(n)            Timerhs_set_compare_c((U16)((1<<n)-1))
00117 #       define Timerhs_set_compare_d(value)     ( TC4H = ((U8)((value)>>8)), OCR4D = ((U8)(value)))
00118 #       define Timerhs_get_compare_a()          ( (U16)OCR4A|TC4H<<8 )      
00119 #       define Timerhs_get_compare_b()          ( (U16)OCR4B|TC4H<<8 )      
00120 #       define Timerhs_get_compare_d()          ( (U16)OCR4D|TC4H<<8 )      
00121         // ----------
00122 #       define Timerhs_enable_pwm_a()           (DDRC|=0x80, TCCR4A |= (1<<COM4A1), TCCR4A |= (1<<PWM4A))
00123 #       define Timerhs_enable_pwm_b()           (DDRB|=0x40, TCCR4A |= (1<<COM4B1), TCCR4A |= (1<<PWM4B))
00124 #       define Timerhs_enable_pwm_d()           (DDRD|=0x80, TCCR4C |= (1<<COM4D1), TCCR4C |= (1<<PWM4D))
00125 
00126 #       define Timerhs_enable_pwm_a_and_na()    (DDRC|=0xC0, TCCR4A |= (1<<COM4A0), TCCR4A |= (1<<PWM4A))
00127 #       define Timerhs_enable_pwm_b_and_nb()    (DDRB|=0x60, TCCR4A |= (1<<COM4B0), TCCR4A |= (1<<PWM4B))
00128 #       define Timerhs_enable_pwm_d_and_nd()    (DDRD|=0xC0, TCCR4C |= (1<<COM4D0), TCCR4C |= (1<<PWM4D))
00129 
00130 #       define Timerhs_set_enhanced_pwm_mode()  (TCCR4E |= (1<<ENHC4))
00131 
00132         // ----------
00133 #       define Timerhs_set_waveform_mode(conf)  ( TCCR4D = (TCCR4A & (~((1<<WGM41)|(1<<WGM40)))) | ((conf &  0x3) ))
00134         // ----------
00135 #       define Timerhs_set_clock(value)        ( TCCR4B = (TCCR4B & (~TIMERHS_CLK_MASK)) | (value)  )
00136 #       define Timerhs_get_clock()             (((TCCR4B & TIMERHS_CLK_MASK) )
00137         // ----------
00138 
00139 
00140 //_____ T I M E R   D E F I N I T I O N S ______________________________________
00141 
00142     // ---------- Pre-definitions for "conf" field for Timerhs_set_waveform_mode(conf) macro
00143 #define TIMERHS_WGM_NORMAL                   (0)
00144 #define TIMERHS_WGM_FAST_PWM                 (0)
00145 #define TIMERHS_WGM_PHASEFREQCORRECT_PWM     (1)
00146 #define TIMERHS_WGM_PWM6_SINGLE_SLOPE        (2)
00147 #define TIMERHS_WGM_PWM6_DUAL_SLOPE          (3)
00148 
00149 
00150     // ---------- Pre-definitions for "value" field for Timerhs_set_clock(value) macro
00151 #define TIMERHS_NO_CLOCK                  (0)
00152 #define TIMERHS_CLK_BY_1                  (1)
00153 #define TIMERHS_CLK_BY_2                  (2)
00154 #define TIMERHS_CLK_BY_4                  (3)
00155 #define TIMERHS_CLK_BY_8                  (4)
00156 #define TIMERHS_CLK_BY_16                 (5)
00157 #define TIMERHS_CLK_BY_32                 (6)
00158 #define TIMERHS_CLK_BY_64                 (7)
00159 #define TIMERHS_CLK_BY_128                (8)
00160 #define TIMERHS_CLK_BY_256                (9)
00161 #define TIMERHS_CLK_BY_512                (10)
00162 #define TIMERHS_CLK_BY_1024               (11)
00163 #define TIMERHS_CLK_BY_2048               (12)
00164 #define TIMERHS_CLK_BY_4096               (13)
00165 #define TIMERHS_CLK_BY_8192               (14)
00166 #define TIMERHS_CLK_BY_16384              (15)
00167 
00168 #define TIMERHS_CLK_MASK                  ((1<<CS43) | (1<<CS42) |(1<<CS41) |(1<<CS40) )
00169 
00170 //_____ D E C L A R A T I O N S ________________________________________________
00171 
00172 //------------------------------------------------------------------------------
00173 //  @fn timerhs_get_counter
00183 extern  U16 timerhs_get_counter(void);
00184 
00185 //------------------------------------------------------------------------------
00186 //  @fn timerhs_get_capture
00196 extern  U16 timerhs_get_capture(void);
00197 
00198 //______________________________________________________________________________
00199 
00200 #endif  // _TIMERHS_DRV_H_
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