pwm.c

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#include "config.h"
#include "enums.h"

#ifdef __GNUC__
   #include "lib_mcu/pwm/pwm.h"
   #include "lib_mcu/pll/pll_drv.h"
   #include "lib_mcu/timer/time.h"
#elif __ICCAVR__
   #include "PWM.h"
   #include "lib_mcu/timer/time.h"
   #include "lib_mcu/pll/pll_drv.h"
#else
   #error Current COMPILER not supported
#endif


#define DEBUG

//******************************************************************************
// Functions
//******************************************************************************
void PWM_Stop(void)
{
   OCR4B = 0;  // Reset compare level.
   TCCR4A = 0; // Set normal port operation, disable PWM modes.
   TCCR4B = 0; // Stop timer/counter4.
   TCCR4C = 0; // Set normal port operation.
   TCCR4D = 0; // No fault protection, normal waveform.
   OCR4C = 0;  // Reset compare.
   OCR4D = 0;  // Reset compare.
   DT4 = 0;    // No dead time values.
}


void PWM_Start(void)
{

   // Clear OC4A on compare match, enable PWM on comparator OCR4A.
   TCCR4A = (1<<COM4A1)|(1<<PWM4A);
   
   // Non-inverted PWM, T/C stopped.
   TCCR4B = 0;
   
   // Copy shadow bits, disconnect OC4D.
   TCCR4C = (TCCR4A & 0xF0);
   
   // No fault protection, use phase & frequency correct PWM.
   TCCR4D = (0<<WGM41)|(1<WGM40);
   
   // Does not matter -- PWM6 mode not used.
   TCCR4E = 0;
   
   // Set reset compare level. (Offset is used, or JumperCheck() will fail.)
   OCR4A = PWM_OFFSET;

   // Does not matter -- OC4B is disabled.
   OCR4B = 0;
      
   // TOP value for PWM, f(PWM) = 64MHz / 255 = 251kHz.
   OCR4C = 0xFF;
   
   // Does not matter -- OC4D is disabled.
   OCR4D = 0;
   
   // No dead time values.
   DT4 = 0;
      
   // Set PWM port pin to output (PC7).
   DDRC |= (1<<PORTC7);

   // Enable PLL, use full speed mode.
// PLLCSR = (1<<PLLE);

   //cgs update
#ifdef __GNUC__
   Enable_interrupt();
#else
   __enable_interrupt();
#endif

   // Use general timer and wait 1 ms for PLL lock to settle.
   Time_Set(TIMER_GEN,0,0,1);
   
   //cgs update
   Time_Start();  

   do{ 
   }while(Time_Left(TIMER_GEN));

   // Now wait for PLL to lock.
   do{ 
   }while((PLLCSR & (1<<PLOCK)) == 0);
   
   //SELECT 64MHz for PWM
   Pll_set_hs_tmr_pscal_1dot5();

   // CLK PCK = 64MHz / 1 = 64MHz.
   TCCR4B |= (0<<CS43)|(0<<CS42)|(0<<CS41)|(1<<CS40);
}


unsigned char PWM_IncrementDutyCycle(void){
   if (OCR4A < PWM_MAX) {
      OCR4A += 1;
      return(TRUE);
   } else {
      return(FALSE);
   }
}


unsigned char PWM_DecrementDutyCycle(void){
   if (OCR4A > 0) {
      OCR4A -= 1;
      return(TRUE);
   } else {
      return(FALSE);
   }
}