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# adc_drv.h

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    00001 /*This file is prepared for Doxygen automatic documentation generation.*/
    00013
    00014 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
    00015  *
    00016  * Redistribution and use in source and binary forms, with or without
    00017  * modification, are permitted provided that the following conditions are met:
    00018  *
    00019  * 1. Redistributions of source code must retain the above copyright notice,
    00020  * this list of conditions and the following disclaimer.
    00021  *
    00022  * 2. Redistributions in binary form must reproduce the above copyright notice,
    00023  * this list of conditions and the following disclaimer in the documentation
    00024  * and/or other materials provided with the distribution.
    00025  *
    00026  * 3. The name of Atmel may not be used to endorse or promote products derived
    00027  * from this software without specific prior written permission.
    00028  *
    00029  * 4. This software may only be redistributed and used in connection with an Atmel
    00030  * AVR product.
    00031  *
    00032  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
    00033  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    00034  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
    00035  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
    00036  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    00037  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    00038  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    00039  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    00040  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    00041  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    00042  */
    00043
    00044 #ifndef ADC_DRV_H
    00045 #define ADC_DRV_H
    00046
    00047 //_____ I N C L U D E S ____________________________________________________
    00048
    00049 #ifndef  ADHSM
    00050 #define  ADHSM   7
    00051 #endif
    00052
    00056 //_____ M A C R O S ________________________________________________________
    00057
    00058 #define ADC_ADC1_ADC0_x200          0x0B
    00059 #define ADC_ADC1_ADC0_x10           0x09
    00060 #define ADC_ADC1_ADC0_x40           0x26
    00061 #define ADC_TEMP_SENSOR_CHANNEL     0x27
    00062 #define ADC_GND_CHANNEL             0x1F
    00063 #define ADC_BG_CHANNEL              0x1E
    00064
    00068
    00072 #define Enable_adc()                         (ADCSRA |= (1<<ADEN))
    00073
    00074
    00078 #define Right_adjust_adc_result()            (ADMUX  &= ~(1<<ADLAR))
    00079 #define Left_adjust_adc_result()             (ADMUX  |=  (1<<ADLAR))
    00080
    00081
    00085 #define Enable_adc_high_speed_mode()         (ADCSRB |=  (1<<ADHSM))
    00086 #define Disable_adc_high_speed_mode()        (ADCSRB &= ~(1<<ADHSM))
    00087
    00088
    00089
    00093 #define Enable_internal_vref()               (ADMUX  |=  ((1<<REFS1)|(1<<REFS0)) )
    00094 #define Enable_external_vref()               (ADMUX  &= ~((1<<REFS1)|(1<<REFS0)) )
    00095 #define Enable_vcc_vref()                    (ADMUX  &= ~(1<<REFS1),          \
    00096                                               ADMUX  |=  (1<<REFS0) )
    00097
    00098
    00102 #define Enable_all_it()                      (SREG   |=  (0x80) )
    00103 #define Disable_all_it()                     (SREG   &= ~(0x80) )
    00104 #define Enable_adc_it()                      (ADCSRA |=  (1<<ADIE) )
    00105 #define Disable_adc_it()                     (ADCSRA &= ~(1<<ADIE) )
    00106 #define Clear_adc_flag()                     (ADCSRA |=  (1<<ADIF) )
    00107
    00108
    00112 #define Set_adc_prescaler(prescaler)             (ADCSRA &= ~((1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)),\
    00113                                               ADCSRA |=  (prescaler) )
    00114
    00115
    00119 #define MUX4_0_MSK                           ((1<<MUX4)|(1<<MUX3)|(1<<MUX2)|(1<<MUX1)|(1<<MUX0))
    00120 #define Clear_adc_mux()                      ADMUX  &= ~(MUX4_0_MSK),(ADCSRB &= ~(1<<MUX5))
    00121 #define Select_adc_channel(channel)          (Clear_adc_mux(), ADCSRB |= (channel>>5)<<MUX5, ADMUX |= (channel&MUX4_0_MSK))
    00122
    00123
    00127
    00131 #define Start_conv()                          (ADCSRA |= (1<<ADSC) )
    00132 #define Start_conv_channel(channel)           (Select_adc_channel(channel), Start_conv() )
    00133
    00134
    00138 #define Start_conv_idle()                    (SMCR   |=  (1<<SM0)|(1<<SE) )
    00139 #define Start_conv_idle_channel(channel)     (Select_adc_channel(channel), Start_conv_idle() )
    00140 #define Clear_sleep_mode()                   (SMCR   &= ~(1<<SM0)|(1<<SE) )
    00141
    00142
    00144
    00148 #define Adc_get_8_bits_result()               ((U8)(ADCH))
    00149 #define Adc_get_10_bits_result()              ((U16)(ADCL+((U16)(ADCH<<8))))
    00150
    00151
    00152
    00156 #define Disable_adc()                        (ADCSRA &= ~(1<<ADEN))
    00157
    00158
    00162 #define Is_adc_conv_finished()               ((ADCSRA &  (1<<ADIF)) ? TRUE : FALSE)
    00163 #define Is_adc_conv_not_finished()           ((ADCSRA | ~(1<<ADIF)) ? TRUE : FALSE)
    00164
    00165
    00167
    00168 //_____ D E F I N I T I O N S ______________________________________________
    00169
    00170 //_____ F U N C T I O N S __________________________________________________
    00174
    00179 void init_adc(void);
    00181
    00182
    00184
    00185 #endif  // ADC_DRV_H