Transitions to State PLL_ON

This section describes how the state PLL_ON is entered. There are two commands how to get into this state.

1. Writing CMD_PLL_ON to sub register SR_TRX_CMD requests a state change towards PLL_ON. If the radio transceiver is in one of the [BUSY] states, the ongoing transaction will be finished before the state change occurs. Otherwise, the state transition is executed immediately. The following transitions are defined:
   • PHY_STATE_TRX_OFF__PLL_ON
   • PHY_STATE_[PLL_ACTIVE]__PLL_ON
   • PHY_STATE_[BUSY]__PLL_ON
   • PHY_STATE_BUSY_RX_AACK__PLL_ON
2. Writing CMD_FORCE_PLL_ON to sub register SR_TRX_CMD causes an immediate transition. In this case, any ongoing transaction in one of the PLL_ON states is canceled and the state change is done.
   • PHY_FORCE_[ACTIVE]__PLL_ON

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PHY_STATE_TRX_OFF__PLL_ON

If the state PLL_ON is requested from the state TRX_OFF, the PLL needs up to tTR4 to lock to the channel (see also PHY_EVENT_PLL_LOCK). The radio transceiver is only able to transmit frames after the TRX_IRQ_PLL_LOCK occured.

Code example

    /* AT86RF231::TRX_OFF */
    trx_bit_write(SR_TRX_CMD, CMD_PLL_ON);
    delay(tTR4);
    /* AT86RF231::PLL_ON */
    trxstat = trx_bit_read(SR_TRX_STATUS);
    ASSERT(trxstat==PLL_ON);

PHY_STATE_[PLL_ACTIVE]__PLL_ON

If the state PLL_ON is requested from one of the [PLL_ACTIVE] states, the transition occurs within tTR9.

Code example

    /* AT86RF231::[PLL_ACTIVE] */
    trx_bit_write(SR_TRX_CMD, CMD_PLL_ON);
    delay(tTR9);
    /* AT86RF231::PLL_ON */
    trxstat = trx_bit_read(SR_TRX_STATUS);
    ASSERT(trxstat==PLL_ON);

PHY_STATE_[BUSY]__PLL_ON

If the command CMD_PLL_ON is written to the sub register SR_TRX_CMD and the radio transceiver is in one of the [BUSY] states, the ongoing transmit or receive transaction is completed and the state change to PLL_ON occurs with the TRX_IRQ_TRX_END interrupt.

Note:

• It is possible to cancel any ongoing transaction and force an immediate state change by using CMD_FORCE_PLL_ON (see PHY_FORCE_[ACTIVE]__PLL_ON). This might be especially useful in BUSY_TX_ARET, when long backoff times and many CSMA/frame retransmissions are configured.
• This use case is not valid for state BUSY_RX_AACK. For handling of this state refer to PHY_STATE_BUSY_RX_AACK__PLL_ON.

Code example

    /* AT86RF231::[BUSY] */
    trx_bit_write(SR_TRX_CMD, CMD_PLL_ON);
    /* TRX_IRQ_TRX_END occurs here */
    /* AT86RF231::PLL_ON */
    trxstat = trx_bit_read(SR_TRX_STATUS);
    ASSERT(trxstat==PLL_ON);

PHY_STATE_BUSY_RX_AACK__PLL_ON

If the radio transceiver is in state BUSY_RX_AACK, an TRX_IRQ_TRX_END occurs only, if the incoming frame matches the address filter and if the FCS is correct. If the acknowledgment request bit is set in the frame control field of the frame header and an TRX_IRQ_TRX_END occurs, an automatically generated acknowledgement will be transmitted. Thus, the transceiver will stay in BUSY_RX_AACK for time tPAck after TRX_IRQ_TRX_END. Otherwise, it will return to PLL_ON at latest after tFrame.

Note:

• It is possible to read the acknowledgment request subfield of a frame after TRX_IRQ_TRX_END. If this bit is not set, the radio transceiver will be in state PLL_ON immediately after the TRX_IRQ_TRX_END.
• To avoid long timeouts, it is possible to use command CMD_FORCE_PLL_ON to initiate an immediate state change (see PHY_FORCE_[ACTIVE]__PLL_ON).

Code example

    /* AT86RF231::BUSY_RX_AACK */
    trx_bit_write(SR_TRX_CMD, CMD_PLL_ON);
    delay(tFrame);
    /* AT86RF231::PLL_ON */
    trxstat = trx_bit_read(SR_TRX_STATUS);
    ASSERT(trxstat==PLL_ON);

PHY_FORCE_[ACTIVE]__PLL_ON

Writing CMD_FORCE_PLL_ON to sub register SR_TRX_CMD in any of the [PLL_ACTIVE] states cancels any ongoing transmit or receive transaction and switches the radio transceiver within tTR14 to state PLL_ON.

Note:

• The CMD_FORCE_PLL_ON is not applicable in the states SLEEP and {RX_ON,RX_AACK_ON,BUSY_RX_AACK}_NOCLK, and during a STATE_TRANSITION_IN_PROGRESS towards these states.
• Using CMD_FORCE_PLL_ON to interrupt an TX_ARET transaction, it is recommended to check register bits [7:5] of register address 0x32 for value 0. If this value is different, CMD_FORCE_TRX_OFF shall be used immediately followed by CMD_PLL_ON. This performs a state transition to PLL_ON.

Code example

    /* AT86RF231::[ACTIVE] */
    trx_bit_write(SR_TRX_CMD, CMD_FORCE_PLL_ON);
    delay(tTR14);
    /* AT86RF231::PLL_ON */
    trxstat = trx_bit_read(SR_TRX_STATUS);
    ASSERT(trxstat==PLL_ON);

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