Channel Selection

PHY_SET_CHANNEL

The channel is set by writing the channel number to the sub register SR_CHANNEL.

Parameters:
channel The channel number which must be in the range 11<=channel<=26. All other values are reserved and must not be used.
inline_mscgraph_7
Code example
    /* AT86RF231::TRX_OFF */
    trx_bit_write(SR_CHANNEL, channel);

PHY_SET_CHANNEL_LOCK

If the channel is set in one of the states [PLL_ACTIVE], after writing the sub register SR_CHANNEL the TRX_IRQ_PLL_LOCK interrupt is generated, if a channel number which is different from the current channel number, is written to the radio transceiver. This sequence can be used to ensure, whether the PLL has locked to the new frequency.

inline_mscgraph_8
Code example
    /* AT86RF231::[PLL_ACTIVE] */
    trx_bit_write(SR_CHANNEL, channel);
    delay(tTR20);

PHY_GET_CHANNEL

The value from the sub register SR_CHANNEL can be read at any time without affecting any transaction.

inline_mscgraph_9
Code example
    /* AT86RF231::[ACTIVE] */
    channel = trx_bit_read(SR_CHANNEL);

Generated on Mon Jan 12 18:32:15 2009 for SWPM AT86RF231 by  doxygen 1.5.2